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== Overview == | == Overview == | ||
| − | The EPYC Embedded family is a low-power variant of the {{amd|EPYC}} line that primarily | + | The EPYC Embedded family is a low-power variant of the {{amd|EPYC}} line that primarily towards embedded devices such as networking, storage, and edge computing devices. Those parts have lower TDPs and come in a much smaller package allowing for denser integration. |
== Members == | == Members == | ||
=== 3000 Series (Zen) === | === 3000 Series (Zen) === | ||
{{see also|amd/cores/snowy_owl|amd/microarchitectures/zen|l1=Snowy Owl|l2=Zen µarch}} | {{see also|amd/cores/snowy_owl|amd/microarchitectures/zen|l1=Snowy Owl|l2=Zen µarch}} | ||
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<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
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{{comp table start}} | {{comp table start}} | ||
| − | <table class="comptable sortable tc4 tc5 | + | <table class="comptable sortable tc4 tc5 tc13"> |
| − | {{comp table header|main| | + | {{comp table header|main|12:List EPYC Embedded 3000-Series Processors}} |
| − | {{comp table header|cols|Price|Launched|Cores|Thread|L2$|L3$|%TDP|%Base|%Turbo (Max)|Memory|PCIe Lanes}} | + | {{comp table header|cols|Price|Launched|Cores|Thread|L2$|L3$|%TDP|%Base|%Turbo (Max)|%Turbo (All)|Memory|PCIe Lanes}} |
| − | {{comp table header|lsep| | + | {{comp table header|lsep|12:Single-Chip Package (1 die)}} |
{{#ask: [[Category:microprocessor models by amd]] [[microarchitecture::Zen]] [[family::EPYC Embedded]] [[core count::<8]] | {{#ask: [[Category:microprocessor models by amd]] [[microarchitecture::Zen]] [[family::EPYC Embedded]] [[core count::<8]] | ||
|?full page name | |?full page name | ||
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|?tdp | |?tdp | ||
|?base frequency#GHz | |?base frequency#GHz | ||
| + | |?turbo frequency (13 cores)#GHz | ||
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
|?supported memory type | |?supported memory type | ||
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|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
| − | |userparam= | + | |userparam=14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
| − | {{comp table header|lsep| | + | {{comp table header|lsep|12:Multi-Chip Package (2 dies)}} |
{{#ask: [[Category:microprocessor models by amd]] [[microarchitecture::Zen]] [[family::EPYC Embedded]] [[core count::>9]] | {{#ask: [[Category:microprocessor models by amd]] [[microarchitecture::Zen]] [[family::EPYC Embedded]] [[core count::>9]] | ||
|?full page name | |?full page name | ||
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|?tdp | |?tdp | ||
|?base frequency#GHz | |?base frequency#GHz | ||
| + | |?turbo frequency (13 cores)#GHz | ||
|?turbo frequency (1 core)#GHz | |?turbo frequency (1 core)#GHz | ||
|?supported memory type | |?supported memory type | ||
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|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
| − | |userparam= | + | |userparam=14 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
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== See also == | == See also == | ||
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* Intel {{intel|Xeon D}} | * Intel {{intel|Xeon D}} | ||
* Cavium {{cavium|ThunderX2}} | * Cavium {{cavium|ThunderX2}} | ||
Facts about "EPYC Embedded - AMD"
| designer | AMD + |
| first announced | February 22, 2018 + |
| first launched | February 22, 2018 + |
| full page name | amd/epyc embedded + |
| instance of | system on a chip family + |
| instruction set architecture | x86-64 + |
| main designer | AMD + |
| manufacturer | GlobalFoundries + |
| microarchitecture | Zen + |
| name | AMD EPYC Embedded + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | Socket SP4 + and Socket SP4r2 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |