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|family=EPYC Embedded | |family=EPYC Embedded | ||
|series=3000 | |series=3000 | ||
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|frequency=1,850 MHz | |frequency=1,850 MHz | ||
|turbo frequency1=3,000 MHz | |turbo frequency1=3,000 MHz | ||
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|clock multiplier=18.5 | |clock multiplier=18.5 | ||
|isa=x86-64 | |isa=x86-64 | ||
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|microarch=Zen | |microarch=Zen | ||
|core name=Snowy Owl | |core name=Snowy Owl | ||
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|process=14 nm | |process=14 nm | ||
|transistors=9,600,000,000 | |transistors=9,600,000,000 | ||
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|tjunc min=0 °C | |tjunc min=0 °C | ||
|tjunc max=105 °C | |tjunc max=105 °C | ||
− | |package | + | |package module 1={{packages/amd/package sp4}} |
}} | }} | ||
− | '''EPYC Embedded 3401''' is a {{arch|64}} [[ | + | '''EPYC Embedded 3401''' is a {{arch|64}} [[hexadeca-core]] [[x86]] embedded microprocessor introduced by [[AMD]] in early [[2018]] for dense servers and edge devices. Fabricated on a [[14 nm process]] based on the {{amd|Zen|Zen microarchitecture|l=arch}}, this chip operates at 1.85 GHz with a TDP of 85 W and a {{amd|precision boost|turbo frequency}} of up to 3 GHz. The 3401 supports up to 1 TiB of quad-channel DDR4-2666 ECC memory. |
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+ | {{unknown features}} | ||
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== Cache == | == Cache == | ||
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | {{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}} | ||
{{cache size | {{cache size | ||
− | |l1 cache= | + | |l1 cache=1.5 MiB |
|l1i cache=1 MiB | |l1i cache=1 MiB | ||
− | |l1i break= | + | |l1i break=16x64 KiB |
|l1i desc=4-way set associative | |l1i desc=4-way set associative | ||
|l1d cache=512 KiB | |l1d cache=512 KiB | ||
− | |l1d break= | + | |l1d break=16x32 KiB |
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
|l1d policy=write-back | |l1d policy=write-back | ||
|l2 cache=8 MiB | |l2 cache=8 MiB | ||
− | |l2 break= | + | |l2 break=16x512 KiB |
|l2 desc=8-way set associative | |l2 desc=8-way set associative | ||
|l2 policy=write-back | |l2 policy=write-back | ||
|l3 cache=32 MiB | |l3 cache=32 MiB | ||
− | |l3 break= | + | |l3 break=4x8 MiB |
|l3 desc=16-way set associative | |l3 desc=16-way set associative | ||
|l3 policy=write-back | |l3 policy=write-back | ||
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|controllers=4 | |controllers=4 | ||
|channels=4 | |channels=4 | ||
− | |max bandwidth= | + | |max bandwidth=79.47 GiB/s |
− | |bandwidth schan= | + | |bandwidth schan=19.87 GiB/s |
− | |bandwidth dchan= | + | |bandwidth dchan=39.74 GiB/s |
− | |bandwidth qchan= | + | |bandwidth qchan=79.47 GiB/s |
}} | }} | ||
+ | {{amd ryzen threadripper memory configs}} | ||
== Expansions == | == Expansions == | ||
− | The EPYC Embedded 3401 | + | The EPYC Embedded 3401 has 64 PCIe lanes that are MUX'ed with a number of other ports and can be reconfigured as either SATA ports (up to 16 such ports), or as GbE ports (up to 10 such ports), or any mixed configuration of those options. |
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{{expansions main | {{expansions main | ||
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|pcie config 3=x4 | |pcie config 3=x4 | ||
|pcie config 4=x2 | |pcie config 4=x2 | ||
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}} | }} | ||
{{expansions entry | {{expansions entry | ||
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|eth opts=Yes | |eth opts=Yes | ||
|10ge=Yes | |10ge=Yes | ||
− | |10ge ports= | + | |10ge ports=10 |
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Facts about "EPYC Embedded 3401 - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC Embedded 3401 - AMD#pcie + |
base frequency | 1,850 MHz (1.85 GHz, 1,850,000 kHz) + |
clock multiplier | 18.5 + |
core count | 16 + |
core family | 23 + |
core model | 1 + |
core name | Snowy Owl + |
core stepping | B2 + |
cpuid | 0x00800F12 + |
designer | AMD + |
die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
die count | 2 + |
family | EPYC Embedded + |
first announced | February 21, 2018 + |
first launched | February 21, 2018 + |
full page name | amd/epyc embedded/3401 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 + and SenseMI Technology + |
has locked clock multiplier | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
ldate | February 21, 2018 + |
manufacturer | GlobalFoundries + |
market segment | Embedded + and Server + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory bandwidth | 79.47 GiB/s (81,377.029 MiB/s, 85.33 GB/s, 85,330 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
max memory channels | 4 + |
max sata ports | 16 + |
max usb ports | 4 + |
microarchitecture | Zen + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 3401 + |
name | EPYC Embedded 3401 + |
package | SP4 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR4-2666 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 16 + |
transistor count | 9,600,000,000 + |
turbo frequency (16 cores) | 2,250 MHz (2.25 GHz, 2,250,000 kHz) + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |