Editing amd/epyc embedded/3251

{{amd title|EPYC Embedded 3251}}
{{chip
|name=EPYC Embedded 3251
|no image=Yes
|designer=AMD
|manufacturer=GlobalFoundries
|model number=3251
|part number=PE3251BGR88AF
|market=Server
|market 2=Embedded
|first announced=February 21, 2018
|first launched=February 21, 2018
|last order=2028
|release price=$315
|family=EPYC Embedded
|series=3000
|locked=Yes
|frequency=2,500 MHz
|turbo frequency1=3,100 MHz
|turbo frequency8=3,100 MHz
|clock multiplier=25
|isa=x86-64
|isa family=x86
|microarch=Zen
|core name=Snowy Owl
|core family=23
|core model=1
|core stepping=B2
|cpuid=0x00800F12
|process=14 nm
|transistors=4,800,000,000
|technology=CMOS
|die area=213 mm²
|word size=64 bit
|core count=8
|thread count=16
|max cpus=1
|max memory=512 GiB
|tdp=55 W
|tjunc min=0 °C
|tjunc max=105 °C
|package name 1=amd,sp4r2
}}
'''EPYC Embedded 3251''' is a {{arch|64}} [[octa-core]] [[x86]] embedded microprocessor introduced by [[AMD]] in early [[2018]] for dense servers and edge devices. This processor has CPU cores based on the {{amd|Zen|Zen microarchitecture|l=arch}} and is fabricated on a [[GlobalFoundries]] [[14 nm#GlobalFoundries|14&nbsp;nm]] process. It operates at 2.5 GHz with a {{abbr|TDP}} of 55 W and a {{amd|precision boost|turbo frequency}} of up to 3.1 GHz. The 3251 supports up to 512 GiB of dual-channel DDR4-2666 memory.

== Cache ==
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
{{cache size
|l1 cache=768 KiB
|l1i cache=512 KiB
|l1i break=8 × 64 KiB
|l1i desc=4-way set associative
|l1d cache=256 KiB
|l1d break=8 × 32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=4 MiB
|l2 break=8 × 512 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=16 MiB
|l3 break=2 × 8 MiB
|l3 desc=16-way set associative
|l3 policy=write-back
}}

== Memory controller ==
{{memory controller
|type=DDR4-2666
|ecc=Yes
|max mem=512 GiB
|controllers=2
|channels=2
|max bandwidth=42.67 GB/s
|bandwidth schan=21.33 GB/s
|bandwidth dchan=42.67 GB/s
}}

== Expansions ==
The EPYC Embedded 3251 integrates two 8-port, 16-lane PCIe Gen 1/2/3 (8 GT/s) controllers. All lanes are configurable as x16/x8/x4/x2/x1 wide (e.g. 1x4 + 4x1 + 1x8) PCIe links, some lanes alternatively as SATA Gen 1/2/3 (6 Gb/s) or 10 Gbit/s Ethernet ports. Up to eight SATA ports and four GbE ports are available on this model, as well as four USB 3.1 Gen 1 (5 Gb/s) ports, and the following low speed interfaces: {{abbr|eMMC}}, {{abbr|UART}}, {{abbr|LPC}}, {{abbr|SPI/eSPI}}, {{abbr|I<sup>2</sup>C}}, {{abbr|SMBus}}, {{abbr|GPIO}}.

{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=32
|pcie config=x16
|pcie config 2=x8
|pcie config 3=x4
|pcie config 4=x2
|pcie config 5=x1
}}
{{expansions entry
|type=USB
|usb revision=3.1
|usb ports=4
}}
{{expansions entry
|type=SATA
|sata revision=3.0
|sata ports=8
}}
}}
{{network
|eth opts=Yes
|10ge=Yes
|10ge ports=4
}}

== Features == 
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=Yes
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=Yes
|sse42=Yes
|sse4a=Yes
|sse_gfni=No
|avx=Yes
|avx_gfni=No
|avx2=Yes
|avx512f=No
|avx512cd=No
|avx512er=No
|avx512pf=No
|avx512bw=No
|avx512dq=No
|avx512vl=No
|avx512ifma=No
|avx512vbmi=No
|avx5124fmaps=No
|avx512vnni=No
|avx5124vnniw=No
|avx512vpopcntdq=No
|avx512gfni=No
|avx512vaes=No
|avx512vbmi2=No
|avx512bitalg=No
|avx512vpclmulqdq=No
|abm=Yes
|tbm=No
|bmi1=Yes
|bmi2=Yes
|fma3=Yes
|fma4=No
|aes=Yes
|rdrand=Yes
|sha=Yes
|xop=No
|adx=Yes
|clmul=Yes
|f16c=Yes
|bfloat16=No
|tbt1=No
|tbt2=No
|tbmt3=No
|tvb=No
|bpt=No
|eist=No
|sst=No
|flex=No
|fastmem=No
|ivmd=No
|intelnodecontroller=No
|intelnode=No
|kpt=No
|ptt=No
|intelrunsure=No
|mbe=No
|isrt=No
|sba=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=No
|txt=No
|ht=No
|vpro=No
|vtx=No
|vtd=No
|ept=No
|mpx=No
|sgx=No
|securekey=No
|osguard=No
|intqat=No
|dlboost=No
|3dnow=No
|e3dnow=No
|smartmp=No
|powernow=No
|amdvi=Yes
|amdv=Yes
|amdsme=Yes
|amdtsme=Yes
|amdsev=Yes
|rvi=No
|smt=Yes
|sensemi=Yes
|xfr=No
|xfr2=No
|mxfr=No
|amdpb=No
|amdpb2=No
|amdpbod=No
}}

== Bibliography ==
* [https://ir.amd.com/news-events/press-releases/detail/816/amd-launches-epyc-embedded-and-ryzen-embedded "AMD Launches EPYC™ Embedded and Ryzen™ Embedded Processors for End-to-End “Zen” Experiences from the Core to the Edge"] (Press release). AMD.com. February 21, 2018.
* {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|file=3000-Family-Product-Brief.pdf|publ=AMD|pid=1887102|date=2018}}
* {{cite techdoc|title=Product Brief: AMD EPYC™ Embedded 3000 Family|url=https://www.amd.com/system/files/documents/updated-3000-family-product-brief.pdf|publ=AMD|pid=1887102|rev=E|date=2019}}
* [https://www.amd.com/en/products/specifications/embedded "Embedded Processor Specifications"]. AMD.com. Retrieved October 2020.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	EPYC Embedded 3251 - AMD#pcie +
base frequency	2,500 MHz (2.5 GHz, 2,500,000 kHz) +
clock multiplier	25 +
core count	8 +
core family	23 +
core model	1 +
core name	Snowy Owl +
core stepping	B2 +
cpuid	0x00800F12 +
designer	AMD +
die area	213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
family	EPYC Embedded +
first announced	February 21, 2018 +
first launched	February 21, 2018 +
full page name	amd/epyc embedded/3251 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has amd amd-v technology	true +
has amd amd-vi technology	true +
has amd secure encrypted virtualization technology	true +
has amd secure memory encryption technology	true +
has amd sensemi technology	true +
has amd transparent secure memory encryption technology	true +
has ecc memory support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multiplier	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	768 KiB (786,432 B, 0.75 MiB) +
l1d$ description	8-way set associative +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ description	4-way set associative +
l1i$ size	512 KiB (524,288 B, 0.5 MiB) +
l2$ description	8-way set associative +
l2$ size	4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description	16-way set associative +
l3$ size	16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
last order	2028 +
ldate	February 21, 2018 +
manufacturer	GlobalFoundries +
market segment	Server + and Embedded +
max cpu count	1 +
max junction temperature	378.15 K (105 °C, 221 °F, 680.67 °R) +
max memory	524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth	39.74 GiB/s (40,693.283 MiB/s, 42.67 GB/s, 42,670 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels	2 +
max sata ports	8 +
max usb ports	4 +
microarchitecture	Zen +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	3251 +
name	EPYC Embedded 3251 +
package	SP4r2 +
part number	PE3251BGR88AF +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 315.00 (€ 283.50, £ 255.15, ¥ 32,548.95) +
series	3000 +
smp max ways	1 +
supported memory type	DDR4-2666 +
tdp	55 W (55,000 mW, 0.0738 hp, 0.055 kW) +
technology	CMOS +
thread count	16 +
transistor count	4,800,000,000 +
turbo frequency (1 core)	3,100 MHz (3.1 GHz, 3,100,000 kHz) +
turbo frequency (8 cores)	3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +