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{{amd title|EPYC 7551P}}
 
{{amd title|EPYC 7551P}}
−
{{chip
+
{{mpu
 
|name=EPYC 7551P
 
|name=EPYC 7551P
 
|no image=Yes
 
|no image=Yes
 
|designer=AMD
 
|designer=AMD
 
|manufacturer=GlobalFoundries
 
|manufacturer=GlobalFoundries
−
|model number=7551P
+
|model number=7351P
−
|part number=PS755PBDVIHAF
 
 
|market=Server
 
|market=Server
 
|first announced=June 20, 2017
 
|first announced=June 20, 2017
−
|first launched=June 20, 2017
 
−
|release price=$2,100
 
 
|family=EPYC
 
|family=EPYC
 
|series=7000
 
|series=7000
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|frequency=2,000 MHz
 
|frequency=2,000 MHz
 
|turbo frequency1=3,000 MHz
 
|turbo frequency1=3,000 MHz
−
|turbo frequency2=3,000 MHz
+
|bus links=4
−
|turbo frequency3=3,000 MHz
+
|bus rate=8 GT/s
−
|turbo frequency4=3,000 MHz
 
−
|turbo frequency5=3,000 MHz
 
−
|turbo frequency6=3,000 MHz
 
−
|turbo frequency7=3,000 MHz
 
−
|turbo frequency8=3,000 MHz
 
−
|turbo frequency9=3,000 MHz
 
−
|turbo frequency10=3,000 MHz
 
−
|turbo frequency11=3,000 MHz
 
−
|turbo frequency12=3,000 MHz
 
−
|turbo frequency13=2,550 MHz
 
−
|turbo frequency14=2,550 MHz
 
−
|turbo frequency15=2,550 MHz
 
−
|turbo frequency16=2,550 MHz
 
−
|turbo frequency17=2,550 MHz
 
−
|turbo frequency18=2,550 MHz
 
−
|turbo frequency19=2,550 MHz
 
−
|turbo frequency20=2,550 MHz
 
−
|turbo frequency21=2,550 MHz
 
−
|turbo frequency22=2,550 MHz
 
−
|turbo frequency23=2,550 MHz
 
−
|turbo frequency24=2,550 MHz
 
−
|turbo frequency25=2,550 MHz
 
−
|turbo frequency26=2,550 MHz
 
−
|turbo frequency27=2,550 MHz
 
−
|turbo frequency28=2,550 MHz
 
−
|turbo frequency29=2,550 MHz
 
−
|turbo frequency30=2,550 MHz
 
−
|turbo frequency31=2,550 MHz
 
−
|turbo frequency32=2,550 MHz
 
 
|clock multiplier=20
 
|clock multiplier=20
 
|isa=x86-64
 
|isa=x86-64
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|microarch=Zen
 
|microarch=Zen
 
|core name=Naples
 
|core name=Naples
−
|core family=23
 
−
|core model=1
 
−
|core stepping=B2
 
 
|process=14 nm
 
|process=14 nm
 
|transistors=19,200,000,000
 
|transistors=19,200,000,000
 
|technology=CMOS
 
|technology=CMOS
−
|die area=213 mm²
+
|die area=195.228 mm²
 +
|die length=8.87 mm
 +
|die width=22.01 mm
 
|mcp=Yes
 
|mcp=Yes
 
|die count=4
 
|die count=4
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|max cpus=1
 
|max cpus=1
 
|max memory=2 TiB
 
|max memory=2 TiB
−
|tdp=180 W
+
|package module 1={{packages/amd/socket sp3}}
−
|tcase min=0 °C
 
−
|tcase max=81 °C
 
−
|package name 1=amd,socket_sp3
 
 
}}
 
}}
−
'''EPYC 7551P''' is a {{arch|64}} [[32-core]] [[x86]] enterprise server microprocessor introduced by [[AMD]] in mid-[[2017]]. This processor is based on the {{amd|Zen|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. The 7551P has a base frequency of 2 GHz with a turbo frequency of 3 GHz for up to 12 active cores. This chip has a TDP of 180 W and supports up to 2 TiB of octa-channel DDR4-2666 ECC memory.
+
'''EPYC 7551P''' is a {{arch|64}} [[32-core]] [[x86]] enterprise server microprocessor introduced by [[AMD]] in mid-[[2017]]. This processor is based on the {{amd|Zen|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. The 7551P has a base frequency of 2 GHz with a turbo frequency of 3 GHz for a single active core. This chip has a TDP of 180 W and supports up to 2 TiB of octa-channel DDR4-2666 ECC memory.
  
  
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{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
 
{{main|amd/microarchitectures/zen#Memory_Hierarchy|l1=Zen § Cache}}
 
{{cache size
 
{{cache size
−
|l1 cache=3 MiB
+
|l1 cache=1.5 MiB
−
|l1i cache=2 MiB
+
|l1i cache=1 MiB
−
|l1i break=32x64 KiB
+
|l1i break=16x64 KiB
 
|l1i desc=4-way set associative
 
|l1i desc=4-way set associative
−
|l1d cache=1 MiB
+
|l1d cache=512 KiB
−
|l1d break=32x32 KiB
+
|l1d break=16x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d policy=write-back
 
|l1d policy=write-back
−
|l2 cache=16 MiB
+
|l2 cache=8 MiB
−
|l2 break=32x512 KiB
+
|l2 break=16x512 KiB
 
|l2 desc=8-way set associative
 
|l2 desc=8-way set associative
 
|l2 policy=write-back
 
|l2 policy=write-back
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|ecc=Yes
 
|ecc=Yes
 
|max mem=2 TiB
 
|max mem=2 TiB
−
|controllers=8
+
|controllers=1
 
|channels=8
 
|channels=8
 
|max bandwidth=158.95 GiB/s
 
|max bandwidth=158.95 GiB/s
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|bandwidth dchan=39.72 GiB/s
 
|bandwidth dchan=39.72 GiB/s
 
|bandwidth qchan=79.47 GiB/s
 
|bandwidth qchan=79.47 GiB/s
 +
|bandwidth hchan=119.21 GiB/s
 
|bandwidth ochan=158.95 GiB/s
 
|bandwidth ochan=158.95 GiB/s
−
|bandwidth hchan=119.21 GiB/s
 
−
}}
 
−
 
−
== Expansions ==
 
−
The EPYC 7551P has 128 Gen 3 PCIe lanes.
 
−
{{expansions
 
−
| pcie revision      = 3.0
 
−
| pcie lanes        = 128
 
−
| pcie config        = 8x16
 
−
| pcie config 2      = 32x4
 
−
| sata revision      =
 
−
| sata ports        =
 
−
| usb revision      =
 
−
| usb revision 2    =
 
−
| usb ports          =
 
−
| usb rate          =
 
−
| uart              =
 
−
| uart ports        =
 
−
| gp io              =
 
 
}}
 
}}
  
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|avx=Yes
 
|avx=Yes
 
|avx2=Yes
 
|avx2=Yes
−
 
+
|avx512=No
 
|abm=Yes
 
|abm=Yes
 
|tbm=No
 
|tbm=No
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|amdvi=Yes
 
|amdvi=Yes
 
|amdv=Yes
 
|amdv=Yes
−
|amdsme=Yes
 
−
|amdtsme=Yes
 
−
|amdsev=Yes
 
 
|rvi=No
 
|rvi=No
 
|smt=Yes
 
|smt=Yes

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Retrieved from "https://en.wikichip.org/wiki/amd/epyc/7551p"
Facts about "EPYC 7551P - AMD"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
EPYC 7551P - AMD#io +
base frequency2,000 MHz (2 GHz, 2,000,000 kHz) +
clock multiplier20 +
core count32 +
core family23 +
core model1 +
core nameNaples +
core steppingB2 +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
die count4 +
familyEPYC +
first announcedJune 20, 2017 +
first launchedJune 20, 2017 +
full page nameamd/epyc/7551p +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has amd amd-v technologytrue +
has amd amd-vi technologytrue +
has amd secure encrypted virtualization technologytrue +
has amd secure memory encryption technologytrue +
has amd sensemi technologytrue +
has amd transparent secure memory encryption technologytrue +
has ecc memory supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multiplierfalse +
has simultaneous multithreadingtrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size3,072 KiB (3,145,728 B, 3 MiB) +
l1d$ description8-way set associative +
l1d$ size1,024 KiB (1,048,576 B, 1 MiB) +
l1i$ description4-way set associative +
l1i$ size2,048 KiB (2,097,152 B, 2 MiB) +
l2$ description8-way set associative +
l2$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
l3$ description16-way set associative +
l3$ size64 MiB (65,536 KiB, 67,108,864 B, 0.0625 GiB) +
ldateJune 20, 2017 +
manufacturerGlobalFoundries +
market segmentServer +
max case temperature354.15 K (81 °C, 177.8 °F, 637.47 °R) +
max cpu count1 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth158.95 GiB/s (162,764.8 MiB/s, 170.671 GB/s, 170,671.263 MB/s, 0.155 TiB/s, 0.171 TB/s) +
max memory channels8 +
max pcie lanes128 +
microarchitectureZen +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number7551P +
nameEPYC 7551P +
packageFCLGA-4094 + and SP3 +
part numberPS755PBDVIHAF +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 2,100.00 (€ 1,890.00, £ 1,701.00, ¥ 216,993.00) +
series7000 +
smp max ways1 +
socketSP3 + and LGA-4094 +
supported memory typeDDR4-2666 +
tdp180 W (180,000 mW, 0.241 hp, 0.18 kW) +
technologyCMOS +
thread count64 +
transistor count19,200,000,000 +
turbo frequency (10 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (11 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (12 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (13 cores)2,550 MHz (2.55 GHz, 2,550,000 kHz) +
turbo frequency (14 cores)2,550 MHz (2.55 GHz, 2,550,000 kHz) +
turbo frequency (15 cores)2,550 MHz (2.55 GHz, 2,550,000 kHz) +
turbo frequency (16 cores)2,550 MHz (2.55 GHz, 2,550,000 kHz) +
turbo frequency (17 cores)2,550 MHz +
turbo frequency (18 cores)2,550 MHz +
turbo frequency (19 cores)2,550 MHz +
turbo frequency (1 core)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (20 cores)2,550 MHz +
turbo frequency (21 cores)2,550 MHz +
turbo frequency (22 cores)2,550 MHz +
turbo frequency (23 cores)2,550 MHz +
turbo frequency (24 cores)2,550 MHz +
turbo frequency (25 cores)2,550 MHz +
turbo frequency (26 cores)2,550 MHz +
turbo frequency (27 cores)2,550 MHz +
turbo frequency (28 cores)2,550 MHz +
turbo frequency (29 cores)2,550 MHz +
turbo frequency (2 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (30 cores)2,550 MHz +
turbo frequency (31 cores)2,550 MHz +
turbo frequency (32 cores)2,550 MHz +
turbo frequency (3 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (4 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (5 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (6 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (7 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (8 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
turbo frequency (9 cores)3,000 MHz (3 GHz, 3,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +