Editing amd/athlon mp

{{amd title|Athlon MP}}
{{ic family
| title             = Athlon MP
| image             = AMD Athlon MP logo.svg
| caption           = Athlon MP logo
| developer         = AMD
| manufacturer      = AMD
| type              = Microprocessors
| first announced   = June 5, 2001
| first launched    = June 5, 2001
| production start  = 
| production end    = 
| arch              = Server x86 multiprocessors
| isa               = x86
| microarch         = K7
| word              = 32 bit
| proc              = 180 nm
| proc 2            = 130 nm
| tech              = CMOS
| clock min         = 1,000 MHz
| clock max         = 2,130 MHz
| package           = CPGA-453
| socket            = Socket A

| succession       = Yes
| predecessor      = Athlon
| predecessor link = amd/athlon
| successor        = Opteron
| successor link   = amd/opteron
}}
'''Athlon MP''' ('''Athlon Multiprocessor''') was a family of {{arch|32}} [[x86]] server [[multiprocessors]] designed by [[AMD]] specifically for the server and workstations market. Athlon MP was AMD's first multiprocessing-capable platform.

== Overview ==
{{see also|amd/microarchitectures/k7|l1=K7 Microarchitecture}}
AMD announced their first multiprocessing-capable platform at Computex Taipei on June 5th, 2001. As with all the other Athlon families, the Athlon MP is also based on the {{amd|K7|l=arch}} microarchitecture. The platform includes the Athlon MP processors as well as the {{amd|AMD-760MP}} northbridge [[chipset]]. {{amd|AMD-760MP}} supports one- and two-way setups and Double Data Rate (DDR) memory operating at 133 MHz. At the time, AMD's vice president for their servers group stated Athlon MP processor delivers up to 38% higher performance over their competition (presumably referring to {{intel|Xeon}}).

{{expand section}}
=== SmartMP Technology ===
{{main|amd/smartmp|l1=SmartMP Technology}}
{{empty section}}

=== Modding Athlon XP ===
In early 2002 [http://www.hardwarezone.com/articles/articles.hwz?cid=2&aid=393&page=2 HardwareZone.com published an article] detailing the ability to modify a stock {{amd|Athlon XP}} processor (which shares an identical core to the Athlon MPs) to allow it to recognize dual-socket configuration effectively turning it into an expensive Athlon MP processor. The modification is a trivial bridge on the L5 circuit on the top of the Athlon XP package (see article for detail). Various degrees of success has been reported.

== Chip Identification ==
{{chip identification
| style     = 
| parts     = 9
| ex 1      = A
| ex 2      = HX
| ex 3
| ex 4      = 1200
| ex 5      = A
| ex 6      = M
| ex 7      = S
| ex 8      = 3
| ex 9      = C
| ex 2 1    = A
| ex 2 2    = MS
| ex 2 3    = N
| ex 2 4    = 1200
| ex 2 5    = D
| ex 2 6    = K
| ex 2 7    = T
| ex 2 8    = 3
| ex 2 9    = B
| desc 1    = '''Family:'''<br>A - Athlon-based ({{amd|K7}})
| desc 2    = '''Type:'''<br>HX - High-Performance Multiprocessors<br>MP - High-Performance Multiprocessors<br>MS - High-Performance Multiprocessors with {{amd|QuantiSpeed}}
| desc 3    = '''Max Power:'''<br>N - 60 W
| desc 4    = '''Speed (MHz)'''
| desc 5    = '''Package:'''<br>A - PGA<br>D - OPGA
| desc 6    = '''V<sub>CORE</sub>:'''<br><table><tr><td>L - 1.5 V</td><td>H - 1.55 V</td></tr><tr><td>U - 1.6 V</td><td>K - 1.65 V</td></tr><tr><td>P - 1.7 V</td><td>M - 1.75 V</td></tr><tr><td>N - 1.80 V</td></tr></table>
| desc 7    = '''T<sub>CASE</sub>:'''<br>S - 95 °C<br>T - 90 °C<br>V - 85 °C
| desc 8    = '''L2$ Size:'''<br>3 - 256 [[KiB]]<br>4 - 512 [[KiB]]
| desc 9    = '''FSB:'''<br>B - 100 MHz (200 MT/s)<br>C - 133 MHz (266 MT/s)
}}

== Models ==

=== {{amd|Palomino|l=core}} Core ===
Palomino-based microprocessors (i.e. Model 6) were manufactured on AMD's mature [[180 nm process]] copper interconnect technology at Fab 30 foundry in [[wikipedia:Dresden, Germany|Dresden, Germany]]. The core implements an exclusive 256 [[KiB]] [[L2$]] and a 128 KiB [[L1$]]. As with all [[Socket A]] processors ({{decc|EV6}} system bus), Athlon MP operate on a 133 MHz FSB DDR (double data rate) yielding an effective 266 MT/s transfer rate (note that 'B' models operated at a lower FSB of 100 MHz). These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}. AMD came short with Palomino by not supporting {{x86|SSE2}} which came out in the various {{intel|Pentium 4}} models that were released around the same time.
<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
<table class="wikitable sortable tc7">
<tr><th colspan="9" style="background:#D6D6FF;">Palomino-based Athlon MP Microprocessors</th></tr>
<tr><th>Model</th><th>OPN</th><th>Price</th><th>Launched</th><th>L2$</th><th>Freq</th><th>Multiplier</th><th>TDP</th><th>V<sub>CORE</sub></th></tr>
{{#ask: [[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Palomino]]
 |?full page name
 |?model number
 |?part number
 |?release price
 |?first launched
 |?l2$ size#KiB
 |?base frequency#GHz
 |?clock multiplier
 |?tdp
 |?core voltage
 |format=template
 |template=proc table 2
 |userparam=10
 |mainlabel=-
}}
{{table count|col=9|ask=[[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Palomino]]}}
</table>

=== {{amd|Thoroughbred|l=core}} Core ===
AMD introduced Thoroughbred-based processors (i.e. Model 8) in late [[2002]]. Those chips were manufactured on a newer [[130 nm process]] which allowed them to be clocked at higher frequencies. The new process also allowed AMD to rearrange their design which allowed them to shave off roughly 300,000 [[transistor]]s. These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}.
<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
<table class="wikitable sortable tc7">
<tr><th colspan="9" style="background:#D6D6FF;">Thoroughbred-based Athlon MP Microprocessors</th></tr>
<tr><th>Model</th><th>OPN</th><th>Price</th><th>Launched</th><th>L2$</th><th>Freq</th><th>Multiplier</th><th>TDP</th><th>V<sub>CORE</sub></th></tr>
{{#ask: [[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Thoroughbred]]
 |?full page name
 |?model number
 |?part number
 |?release price
 |?first launched
 |?l2$ size#KiB
 |?base frequency#GHz
 |?clock multiplier
 |?tdp
 |?core voltage
 |format=template
 |template=proc table 2
 |userparam=10
 |mainlabel=-
}}
{{table count|col=9|ask=[[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Thoroughbred]]}}
</table>

=== {{amd|Barton|l=core}} Core ===
The last chip in the Athlon MP series was introduced in early [[2003]]. The {{amd|Barton|l=core}}-based processor (i.e. model 10), which was also manufactured on a [[130 nm process]], doubled the amount of level 2 cache (to 512 KiB). Barton-based processors sold for significantly lower price than the newer Opteron models which made them attractive for entry-level servers and workstations. These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}.
<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
<table class="wikitable sortable tc7">
<tr><th colspan="9" style="background:#D6D6FF;">Barton-based Athlon MP Microprocessors</th></tr>
<tr><th>Model</th><th>OPN</th><th>Price</th><th>Launched</th><th>L2$</th><th>Freq</th><th>Multiplier</th><th>TDP</th><th>V<sub>CORE</sub></th></tr>
{{#ask: [[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Barton]]
 |?full page name
 |?model number
 |?part number
 |?release price
 |?first launched
 |?l2$ size#KiB
 |?base frequency#GHz
 |?clock multiplier
 |?tdp
 |?core voltage
 |format=template
 |template=proc table 2
 |userparam=10
 |mainlabel=-
}}
{{table count|col=9|ask=[[Category:microprocessor models by amd]] [[microprocessor family::Athlon MP]] [[core name::Barton]]}}
</table>

== Documents ==
=== Datasheets ===
* [[:File:AMD Athlon MP Processor Model 6 Data Sheet.pdf|AMD Athlon MP Processor Model 6 Data Sheet Multiprocessor-Capable for Workstation and Server Platforms]]; Publication # 24685; Rev.: B; Issue Date: June 2001.
* [[:File:AMD Athlon MP Processor Model 6 OPGA Data Sheet for Multiprocessor Multiprocessor Platforms.pdf|AMD Athlon MP Processor Model 6 OPGA Data Sheet for Multiprocessor Platforms]]; Publication # 25480 Rev: D; Issue Date: June 2002.
* [[:File:AMD Athlon MP Processor Model 8 Data Sheet for Multiprocessor Platforms.pdf|AMD Athlon MP Processor Model 8 Data Sheet for Multiprocessor Platforms]]; Publication # 25722 Rev. E; Issue Date: March 2003.
* [[:File:AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms.pdf|AMD Athlon MP Processor Model 10 Data Sheet for Multiprocessor Platforms]]; Publication # 26426 Rev. C; Issue Date: October 2003.
=== Others ===
* [[:File:System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
@@ Line 32: / Line 32: @@
 == Overview ==
-{{see also|amd/microarchitectures/k7|l1=K7 Microarchitecture}}[[File:dual-socket Tyan s2462 Mother Board.jpg|thumb|Tyan S2462 motherboard for dual-socket Athlon MP processors.]]
+{{see also|amd/microarchitectures/k7|l1=K7 Microarchitecture}}
 AMD announced their first multiprocessing-capable platform at Computex Taipei on June 5th, 2001. As with all the other Athlon families, the Athlon MP is also based on the {{amd|K7|l=arch}} microarchitecture. The platform includes the Athlon MP processors as well as the {{amd|AMD-760MP}} northbridge [[chipset]]. {{amd|AMD-760MP}} supports one- and two-way setups and Double Data Rate (DDR) memory operating at 133 MHz. At the time, AMD's vice president for their servers group stated Athlon MP processor delivers up to 38% higher performance over their competition (presumably referring to {{intel|Xeon}}).
@@ Line 44: / Line 44: @@
 == Chip Identification ==
-<div style="float: right;">[[File:AMD Athlon MP and AMD-760MP chipset (overhead view).gif|450px]]<br>Athlon MP processor along with the {{amd|AMD-760MP}} chipset (north and south bridge)</div>
 {{chip identification
 | style     =
@@ Line 78: / Line 77: @@
 == Models ==
-[[File:Atlhon MP (.13 micron; back).jpg|right|350px]]
 === {{amd|Palomino|l=core}} Core ===
 Palomino-based microprocessors (i.e. Model 6) were manufactured on AMD's mature [[180 nm process]] copper interconnect technology at Fab 30 foundry in [[wikipedia:Dresden, Germany|Dresden, Germany]]. The core implements an exclusive 256 [[KiB]] [[L2$]] and a 128 KiB [[L1$]]. As with all [[Socket A]] processors ({{decc|EV6}} system bus), Athlon MP operate on a 133 MHz FSB DDR (double data rate) yielding an effective 266 MT/s transfer rate (note that 'B' models operated at a lower FSB of 100 MHz). These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}. AMD came short with Palomino by not supporting {{x86|SSE2}} which came out in the various {{intel|Pentium 4}} models that were released around the same time.
@@ Line 142: / Line 141: @@
 === {{amd|Barton|l=core}} Core ===
-[[File:Atlhon MP (.13 micron; overview).png|right|350px]]
 The last chip in the Athlon MP series was introduced in early [[2003]]. The {{amd|Barton|l=core}}-based processor (i.e. model 10), which was also manufactured on a [[130 nm process]], doubled the amount of level 2 cache (to 512 KiB). Barton-based processors sold for significantly lower price than the newer Opteron models which made them attractive for entry-level servers and workstations. These processors support {{x86|MMX}}, {{x86|SSE}}, {{x86|Enhanced 3DNow!}}, and {{amd|SmartMP Technology}}.
 <!-- NOTE:
@@ Line 181: / Line 179: @@
 === Others ===
 * [[:File:System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
-* [[:File:AMD-760 Chipset & DDR Memory Presentation.pdf|AMD-760 Chipset & DDR Memory Presentation]]; October 2000.
-== Artwork ==
-<gallery>
-File:AMD Athlon MP and AMD-760MP chipset (background).gif
-File:AMD Athlon MP and AMD-760MP chipset (overhead view).gif
-File:AMD Athlon MP and AMD-760MP chipset (overhead view; background).gif
-File:AMD Athlon MP and AMD-760MP chipset.gif
-File:Atlhon MP (.13 micron; 640k cache) 1.jpg
-File:Atlhon MP (.13 micron; 640k cache) 2.jpg
-File:Atlhon MP (.13 micron; 640k cache) 3.jpg
-File:Atlhon MP (.13 micron; 640k cache) 4.png
-File:Atlhon MP (.13 micron; 640k cache) 5.png
-File:Atlhon MP (.13 micron; 640k cache) 6.png
-File:Atlhon MP (.13 micron; back).jpg
-File:Atlhon MP (.13 micron; overview).png
-File:Atlhon MP (.13 micron; side).png
-</gallery>
designer	AMD +
first announced	June 5, 2001 +
first launched	June 5, 2001 +
full page name	amd/athlon mp +
instance of	microprocessor family +
instruction set architecture	x86 +
main designer	AMD +
manufacturer	AMD +
microarchitecture	K7 +
name	Athlon MP +
package	CPGA-453 +
process	180 nm (0.18 μm, 1.8e-4 mm) + and 130 nm (0.13 μm, 1.3e-4 mm) +
socket	Socket A +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +