Editing ambric/am2000/am2045b

{{ambric title|Am2045B}}
{{mpu
| name                = Am2045B
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = Ambric
| manufacturer        = 
| model number        = Am2045B
| part number         = Am2045B
| market              = Embedded
| first announced     = November 15, 2007
| first launched      = November 15, 2007
| last order          = 2012
| last shipment       = 2012

| family              = Am2000
| series              = Gen 2
| locked              = No
| frequency           = 350 MHz
| bus type            = 
| bus speed           = 100 MHz
| bus rate            = 
| clock multiplier    = 3.5

| microarch           = Ambric 
| platform            = 
| chipset             = 
| core name           = 
| core family         = 
| core model          = 
| core stepping       = 
| process             = 130 nm
| transistors         = 180,000,000
| technology          = CMOS
| die size            = 
| word size           = 32 bit
| core count          = 336
| thread count        = 
| max cpus            = 
| max memory          = 4 GB

| electrical          = 
| power               = 
| v core              = 
| v core tolerance    = 
| sdp                 = 
| tdp                 = 
| ctdp down           = 
| ctdp down frequency = 
| ctdp up             = 
| ctdp up frequency   = 
| temp min            = 
| temp max            = 
| tjunc min           = 
| tjunc max           = 
| tcase min           = 
| tcase max           = 
| tstorage min        = 
| tstorage max        = 

| packaging           = Yes
| package 0           = FCBGA-896
| package 0 type      = FCBGA
| package 0 pins      = 896
| package 0 pitch     = 
| package 0 width     = 31 mm
| package 0 length    = 31 mm
| package 0 height    = 
| socket 0            = BGA-896
| socket 0 type       = BGA
}}
'''Am2045B''' was [[Ambric]]'s flagship [[MPPA]] introduced in late 2007. This model was made of {{ambric|am2000#Architecture|42 Brics}} arranged as a grid, making up a total of 336 {{arch|32}} [[RICS]]-like cores operating asynchronously at 1-350 MHz. This was an enhanced version of the {{\\|Am2045|original}} which featured a higher bandwidth [[network on a chip]] (Ambric claimed up to 40 percent improvement), operated at higher frequency, and provided up to 1.2 trillion operations per seconds theoretical peak computation. This model also had lower power consumption over the original.

== Architecture ==
{{main|ambric/am2000#Architecture|l1=Am2000 § Architecture}}
The Am2045B is made of 42 homogeneous 'Brics' laid out in a grid to form 336 cores.

General layout:
* 42x Brics
** 2x Computer Unit (CU)
*** 2x SRD {{arch|32}} CPU
*** 2x RD {{arch|32}} CPU
** 2x [[RAM]] Unit (RU)
*** 4x 2 KB [[SRAM]] bank

== Memory controller ==
{{integrated memory controller
| type               = DDR2-400
| controllers        = 2
| channels           = 1
| ecc support        = 
| max bandwidth      = 
| bandwidth schan    = 
| bandwidth dchan    = 
| max memory         = 4 GB
}}

== Expansions ==
* [[has feature::PCIe]]
* [[has feature::JTAG]]
* 128x [[has feature::GPIO]] @ 100 MHz
* [[has feature::serial flash]]
base frequency	350 MHz (0.35 GHz, 350,000 kHz) +
bus speed	100 MHz (0.1 GHz, 100,000 kHz) +
clock multiplier	3.5 +
core count	344 +
designer	Ambric +
family	Am2000 +
first announced	November 15, 2007 +
first launched	November 15, 2007 +
full page name	ambric/am2000/am2045b +
has feature	PCIe +, JTAG +, GPIO + and serial flash +
has locked clock multiplier	false +
instance of	microprocessor +
last order	2012 +
last shipment	2012 +
ldate	November 15, 2007 +
market segment	Embedded +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitecture	Ambric +
model number	Am2045B +
name	Am2045B +
part number	Am2045B +
process	130 nm (0.13 μm, 1.3e-4 mm) +
series	Gen 2 +
technology	CMOS +
transistor count	180,000,000 +
word size	32 bit (4 octets, 8 nibbles) +