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− | '''Au1''' is a [[microarchitecture]] developed by [[Alchemy Semiconductor]] for | + | '''Au1''' is a [[microarchitecture]] developed by [[Alchemy Semiconductor]] for its {{alchemy|Alchemy}} family of high performance, ultra low power embedded microprocessors. Details about Au1 were disclosed at the Embedded Processor Forum in San Jose, CA, on June 13, 2000. |
The first processor using an Au1 CPU core, the Alchemy Au1000 {{abbr|SoC}}, is rated for core frequencies up to 500 MHz. At 400 MHz it operates at 1.5 V and the chip consumes no more than 500 mW, with a performance of over 900 Dhrystone 2.1 MIPS/Watt according to the company. Au1000 and Au1500 processors were fabricated on a [[TSMC]] [[180 nm]] LV logic 1.5V/3.3V 1P6M process, the Au1100 reduced power consumption further with a [[TSMC]] [[130 nm]] process. Manufacturing details of later models are unknown. | The first processor using an Au1 CPU core, the Alchemy Au1000 {{abbr|SoC}}, is rated for core frequencies up to 500 MHz. At 400 MHz it operates at 1.5 V and the chip consumes no more than 500 mW, with a performance of over 900 Dhrystone 2.1 MIPS/Watt according to the company. Au1000 and Au1500 processors were fabricated on a [[TSMC]] [[180 nm]] LV logic 1.5V/3.3V 1P6M process, the Au1100 reduced power consumption further with a [[TSMC]] [[130 nm]] process. Manufacturing details of later models are unknown. |
Facts about "Au1 - Microarchitectures - Alchemy"
codename | Au1 + |
core count | 1 + |
designer | Alchemy + |
first launched | June 13, 2000 + |
full page name | alchemy/microarchitectures/au1 + |
instance of | microarchitecture + |
instruction set architecture | MIPS32 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Au1 + |
pipeline stages | 5 + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + and 130 nm (0.13 μm, 1.3e-4 mm) + |