Editing WikiChip:sandbox

Welcome to this sandbox page. Sandbox pages provide space to experiment with the process of editing.
<hr />


<table style="border: 1px solid black; border-collapse: collapse; border-spacing:0; text-align: center;">
<tr><td colspan="9">ssssssssssss</td></tr>
<tr><td></td><td></td><td style="height: 10px;"></td><td></td><td rowspan="17" style="margin: 0px; padding: 0px;"><div style="background: black; padding: 0px; height: 275px; width: 125px;"><div style="margin: 0px; width: 25px; height: 15px; background: silver; border-radius: 0 0 25px 25px; margin: 0 auto; "></div></div></td><td></td><td></td><td></td><td></td></tr>
<tr style="height: 5px;"><td rowspan="7">DATA<br>BUS<br>I/O</td><td style="border-left: 2px solid black; border-top: 2px solid black;"></td>&nbsp;<td>D<sub>0</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">01</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">16</td><td>CM-RAM<sub>0</sub></td><td style="border-right: 2px solid black; border-top: 2px solid black;"></td><td>X</td></tr>
<tr style="height: 5px;"><td style="border-left: 2px solid black"></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td style="border-left: 2px solid black"></td><td>D<sub>1</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">02</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">15</td><td>CM-RAM<sub>1</sub></td><td>X</td></tr>
<tr style="height: 5px;"><td style="border-left: 2px solid black"></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td style="border-left: 2px solid black"></td><td >D<sub>2</sub></td><td  style="margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">03</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">14</td><td>CM-RAM<sub>2</sub></td><td>X</td></tr>
<tr style="height: 5px;"><td style="border-left: 2px solid black"></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td style="border-left: 2px solid black; border-bottom: 2px solid black;">&nbsp;</td><td>D<sub>3</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">04</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">13</td><td>CM-RAM<sub>3</sub></td><td>X</td></tr>
<tr style="height: 5px;"><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td></td><td></td><td>V<sub>ss</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">05</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">12</td><td>V<sub>dd</sub></td><td>X</td></tr>
<tr style="height: 5px;"><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td rowspan="3">CLOCK<br>PHASE 1/2</td><td style="border-left: 2px solid black; border-top: 2px solid black;"></td><td>Ø<sub>1</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">06</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">11</td><td>CM-ROM</td><td>X</td></tr>
<tr style="height: 5px;"><td style="border-left: 2px solid black;"></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td style="border-left: 2px solid black; border-bottom: 2px solid black;"></td><td>Ø<sub>2</sub></td><td style="padding: 0px; margin: 0px; border: 1 solid black; background: #b3b3ff; height: 10px;">07</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">10</td><td>TEST</td><td>X</td></tr>
<tr style="height: 5px;"><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr><td></td><td></td><td>SYNC</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">08</td><td style="margin: 5px; border: 1 solid black; background: #b3b3ff; height: 10px;">09</td><td>RESET</td><td>X</td></tr>
<tr style="height: 5px;"><td></td><td></td><td></td><td></td><td></td><td></td><td></td><td></td></tr>
<tr style="height: 10px;"><td>1</td><td>2</td><td>3</td><td>4</td><td>5</td><td>6</td><td>7</td><td>8</td><td>9</td></tr>
</table>



<table style="border: solid 1px #e5e5ff; width: 550px; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;"><tr style="text-align: center; background: #ccffcc; font-size: 16px;"><td colspan="3"><span style="margin: 10px;">[[File:Sitemap font awesome.svg|25px]]</span><span style="font-weight: bold; font-size: 19px;">Cache Info {{#info: '''[[Cache]]''' is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a [[CPU]] by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.<br><br>The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.<br><br>Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.<br><br>Note: All units are in [[kibibytes]].}}</span><span style="float: right;">[[Special:FormEdit/Cache_info/{{FULLPAGENAME}}|<small><nowiki>[Edit Values]</nowiki></small>]]</span></td></tr>
<tr><th style="min-width: 35px;">L1$</th><td>128 KiB</td><td><table><tr><th style="text-align: center; min-width: 50px;">L1I$</th><td style="min-width: 50px;">64 KiB</td><td style="min-width: 75px;">1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr><tr><th style="text-align: center; min-width: 50px;">L1D$</th><td>64 KiB</td><td>1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr></table></td></tr>
<tr><th style="min-width: 35px;">L2$</th><td>128 KiB</td><td><table><tr><th style="text-align: center; min-width: 50px;">L2I$</th><td style="min-width: 50px;">64 KiB</td><td style="min-width: 75px;">1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr><tr><th style="text-align: center; min-width: 50px;">L2D$</th><td>64 KiB</td><td>1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr></table></td></tr>
<tr><th style="min-width: 35px;">L3$</th><td>128 KiB</td><td><table><tr><th style="text-align: center; min-width: 50px;">L3I$</th><td style="min-width: 50px;">64 KiB</td><td style="min-width: 75px;">1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr><tr><th style="text-align: center; min-width: 50px;">L3D$</th><td>64 KiB</td><td>1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr></table></td></tr>
<tr><th style="min-width: 35px;">L4$</th><td>128 KiB</td><td><table><tr><th style="text-align: center; min-width: 50px;">L4I$</th><td style="min-width: 50px;">64 KiB</td><td style="min-width: 75px;">1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr><tr><th style="text-align: center; min-width: 50px;">L4D$</th><td>64 KiB</td><td>1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr></table></td></tr>
<tr style="text-align: center; background: #ccffcc; font-size: 12px;"><td colspan="3">Off-package cache support</td></tr>
<tr><th style="min-width: 35px;">Mobo</th><td>512 KiB</td><td><table><tr><td style="min-width: 75px;">1x64 KiB</td><td>2-way set associative</td><td>write-back</td></tr></table></td></tr>
</table>


== wireless test ==
<table style="border-collapse: collapse; border: solid 1px #e5e5ff; width: 400px; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;"><tr style="text-align: center; background: #b7d1fb; font-size: 16px;"><td colspan="2"><span style="margin: 10px;">[[File:Antu network-wireless-connected-100.svg|25px]]</span><span style="font-weight: bold; font-size: 19px;">Wireless Communications</span></td></tr>
<tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Wi-Fi'''</td></tr>
<tr style="background: #ffffdb;"><th style="width: 50px;">WiFi</th><td>
<table>
<tr><th style="width: 100px;">802.11-1997</th><td>Yes</td></tr>
<tr><th>802.11a</th><td>Yes</td></tr>
<tr><th>802.11b</th><td>Yes</td></tr>
<tr><th>802.11g</th><td>Yes</td></tr>
<tr><th>802.11n</th><td>Yes</td></tr>
<tr><th>802.11ac</th><td>Yes</td></tr>
<tr><th>802.11ad</th><td>Yes</td></tr>
</table>
</td></tr>
<tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Cellular'''</td></tr>
<tr style="background: #e6ffe6;"><th style="width: 25px;">2G</th><td><table><tr><th style="width: 75px;">GSM</th><td style="width: 90px;">&nbsp;</td><td>Yes</td></tr><tr><th>GPRS</th><td style="width: 90px;">&nbsp;</td><td>Yes</td></tr><tr><th>EDGE</th><td style="width: 90px;">&nbsp;</td><td>Yes</td></tr><tr><th style="width: 75px;">cdmaOne</th><td colspan="2">
<table>
<tr><th style="width: 90px;">IS-95A</th><td>Yes</td></tr>
<tr><th>IS-95B</th><td>Yes</td></tr>
</table>
</td></tr>
</table></td></tr>
<tr style="background: #fff6db;"><th>3G</th><td><table><tr><th style="width: 75px;">UMTS</th><td>
<table>
<tr><th style="width: 90px;">WCDMA</th><td>Yes</td></tr>
<tr><th>HSDPA</th><td>Yes</td><td style="width: 100px; text-align: right;">7.2 Mbps</td></tr>
<tr><th>HSUPA</th><td>Yes</td><td style="width: 100px; text-align: right;">5.76 Mbps</td></tr>
</table>
</td></tr><tr><th style="width: 75px;">CDMA2000</th><td>
<table>
<tr><th style="width: 90px;">1X</th><td>Yes</td></tr>
<tr><th>1xEV-DO</th><td>Yes</td></tr>
<tr><th>1X Advanced</th><td>Yes</td></tr>
</table>
</td></tr></table></td></tr>
<tr style="text-align: center; background: #e7f0fe; font-size: 12px;"><td colspan="2">'''Satellite'''</td></tr>
</table>

== mpu ==
<table class="wiki3table" style="background-color: #FFF; border: 1px solid #709fea; width: 350px; float: right; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;     border-collapse: collapse;">
<tr><td style="text-align: center; background-color: #e6e6e6; font-size: 16px;" colspan="2">'''AMD-X5-133ADW'''</td></tr>
<tr><td style="text-align: center;" colspan="2">[[File:KL AMD 5x86.jpg|150px]]</td></tr>
<tr><td style="text-align: center; background-color: #F0F0F0; font-weight: bold; font-size: 1.2em; border-top: 1px #cccccc solid;" colspan="2">General Info</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Designer</th><td>AMD</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Manufacturer</th><td>AMD</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Model Number</th><td>AMD-X5-133ADW</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Part Number</th><td>AMD-X5-133ADW,<br>AMD-X5-133ADW,<br>AMD-X5-133ADW</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Market</th><td>Desktop</td></tr>
<tr style=""><th style="width: 100px; text-align: right; padding-right: 10px;">Market</th><td>Desktop</td></tr>
</table>ecd9c6

== comptable ==
test
test

{{comp table start}}
<table class="comptable sortable">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="3">IGP</th></tr>
<tr class="comptable-header"><th class="unsortable">Model</th><th>Process</th><th>Launched</th><th>C</th><th>T</th><th>Freq</th><th>TDP</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Turbo Freq</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]
 |?full page name
 |?model number
 |?process
 |?first launched
 |?core count
 |?thread count
 |?base frequency#GHz
 |?tdp
 |?max memory#GiB
 |?integrated gpu
 |?integrated gpu base frequency#MHz
 |?integrated gpu max frequency#GHz
 |format=template
 |template=proc table 3
 |userparam=12
 |mainlabel=-
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]}}
</table>
{{comp table end}}

test
test

== Tabl test ==
@@ Line 1: / Line 1: @@
-<div id="wc_menu_export"></div>@@_START_A_BUTTON_@@<i class="fa fa-company-intel" aria-hidden="true"></i><span class="mob-collapse">&nbsp;Intel&nbsp;<i class="fa fa-angle-down" aria-hidden="true"></i></span>@@_END_A_BUTTON_@@<div style="padding: 20px;" class="collapse">
-<div><span style="font-size: 1.2em; margin: 10px; display: block;">Popular Families</span><hr style="display: block; height: 1px; border: 0; border-top: 1px solid #b7b7b7; margin: 1em 0; padding: 0;"><div style="display: flex;"><ul class="items"><li>@@_START_H5_@@Intel@@_END_H5_@@<ul style="list-style:none; display: flex; flex-direction: column;"><li>Core i3</li></ul></li></ul></div></div>
-<div><span style="font-size: 1.2em; margin: 10px; display: block;">Popular Families</span><hr style="display: block; height: 1px; border: 0; border-top: 1px solid #b7b7b7; margin: 1em 0; padding: 0;"><div style="display: flex;"><ul class="items"><li>@@_START_H5_@@Intel@@_END_H5_@@<ul style="list-style:none; display: flex; flex-direction: column;"><li>Core i3</li></ul></li></ul></div></div>
-<div><span style="font-size: 1.2em; margin: 10px; display: block;">Popular Families</span><hr style="display: block; height: 1px; border: 0; border-top: 1px solid #b7b7b7; margin: 1em 0; padding: 0;"><div style="display: flex;"><ul class="items"><li>@@_START_H5_@@Intel@@_END_H5_@@<ul style="list-style:none; display: flex; flex-direction: column;"><li>Core i3</li></ul></li></ul></div></div>
-</div><div id="wc_menu_export"></div>
 Welcome to this sandbox page. Sandbox pages provide space to experiment with the process of editing.
 <hr />
-=== <span style="float: right;">header text right</span> ===
-== test ==
 <table style="border: 1px solid black; border-collapse: collapse; border-spacing:0; text-align: center;">
 <tr><td colspan="9">ssssssssssss</td></tr>
@@ Line 96: / Line 89: @@
 == comptable ==
-{{#invoke: arch timeline|intel_x86}}
+test
+test
-{{#time:09/01/2015}}
+{{comp table start}}
+<table class="comptable sortable">
-<timeline>
+<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="3">IGP</th></tr>
-ImageSize  = width:1000 height:500
+<tr class="comptable-header"><th class="unsortable">Model</th><th>Process</th><th>Launched</th><th>C</th><th>T</th><th>Freq</th><th>TDP</th><th>Max Mem</th><th>Name</th><th>Freq</th><th>Turbo Freq</th></tr>
-PlotArea   = left:150 right:10 top:10 bottom:25 #left:0 right:0 bottom:20 top:0
+{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]
+ |?full page name
-DateFormat = mm/dd/yyyy
+ |?model number
-Period     = from:2015 till:2021
+ |?process
-ScaleMajor = unit:year increment:1 start:2015
+ |?first launched
-ScaleMinor = unit:month increment:1 start:2015
+ |?core count
+ |?thread count
-TimeAxis   = orientation:horizontal
+ |?base frequency#GHz
-AlignBars  = justify
+ |?tdp
+ |?max memory#GiB
-Colors =
+ |?integrated gpu
-   id:c_arch1 value:rgb(1,0.96,0.90)
+ |?integrated gpu base frequency#MHz
-   id:c_arch2 value:rgb(1,0.92,0.90)
+ |?integrated gpu max frequency#GHz
-   id:c_arch3 value:rgb(1,0.88,0.80)
+ |format=template
-   id:c_arch4 value:rgb(1,0.84,0.80)
+ |template=proc table 3
-   id:c_arch5 value:rgb(1,0.80,0.70)
+ |userparam=12
-   id:c_arch6 value:rgb(1,0.76,0.70)
+ |mainlabel=-
-   id:c_arch7 value:rgb(1,0.72,0.60)
+}}
-   id:c_arch8 value:rgb(1,0.68,0.60)
+{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Core i3]] [[microarchitecture::Kaby Lake]] [[market segment::Desktop]]}}
-   id:c_arch9 value:rgb(1,0.64,0.50)
+</table>
+{{comp table end}}
-   id:c_core1 value:rgb(0.47,0.83,0.91)
-   id:c_core2 value:rgb(0.97,0.90,0.72)
-   id:c_core3 value:rgb(0.68,1,0.91)
-   id:c_core4 value:rgb(0.98,0.73,0.87)
-   id:c_core5 value:rgb(0.78,0.82,0.96)
-   id:c_core6 value:rgb(0.84,0.97,0.96)
-   id:c_core7 value:rgb(0.95,0.83,1)
-   id:c_core8 value:rgb(0.89,0.95,0.87)
-   id:c_core9 value:rgb(0.78,0.93,1)
-BarData =
-  barset:Microarchitectures
-    bar:arch1
-    bar:arch2
-    bar:arch3
-    bar:arch4
-    bar:arch5
-    bar:arch6
-    bar:arch7
-    bar:arch8
-    bar:arch9
-  barset:Cores1
-    bar:core11
-    bar:core12
-    bar:core13
-    bar:core14
-    bar:core15
-    bar:core16
-  barset:Cores2
-    bar:core21
-    bar:core22
-    bar:core23
-    bar:core24
-    bar:core25
-    bar:core26
-  barset:Cores3
-    bar:core31
-    bar:core32
-    bar:core33
-    bar:core34
-    bar:core35
-    bar:core36
-  barset:Cores4
-    bar:core41
-    bar:core42
-    bar:core43
-    bar:core44
-    bar:core45
-    bar:core46
-  barset:Cores5
-    bar:core51
-    bar:core52
-    bar:core53
-    bar:core54
-    bar:core55
-    bar:core56
-  barset:Cores6
-    bar:core61
-    bar:core62
-    bar:core63
-    bar:core64
-    bar:core65
-    bar:core66
-  barset:Cores7
-    bar:core71
-    bar:core72
-    bar:core73
-    bar:core74
-    bar:core75
-    bar:core76
-  barset:Cores8
-    bar:core81
-    bar:core82
-    bar:core83
-    bar:core84
-    bar:core85
-    bar:core86
-  barset:Cores9
-    bar:core91
-    bar:core92
-    bar:core93
-    bar:core94
-    bar:core95
-    bar:core96
-PlotData=
-  width:22 fontsize:10 textcolor:black shift:(5,-4)
-  bar:arch1 color:c_arch1 from:09/01/2015 till:01/01/2018 anchor:from text:"[[intel/microarchitectures/skylake|Skylake]]"
-  bar:arch2 color:c_arch2 from:08/30/2016 till:01/01/2019 anchor:from text:"[[intel/microarchitectures/kaby_lake|Kaby Lake]]"
-  bar:arch3 color:c_arch3 from:07/01/2017 till:01/01/2019 anchor:from text:"[[intel/microarchitectures/coffee_lake|Coffee Lake]]"
-  bar:arch4 color:c_arch4 from:10/01/2017 till:10/01/2019 anchor:from text:"[[intel/microarchitectures/cannonlake|Cannonlake]]"
-  bar:arch5 color:c_arch5 from:08/01/2018 till:01/01/2020 anchor:from text:"[[intel/microarchitectures/icelake|Icelake]]"
-  bar:arch6 color:c_arch6 from:08/01/2019 till:01/01/2021 anchor:from text:"[[intel/microarchitectures/tigerlake|Tigerlake]]"
-  width:10 fontsize:10
+test
-  color:c_core1
+test
-  bar:core11 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake Y"
-  bar:core12 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake Y"
-  bar:core13 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake Y"
-  color:c_core2
-  bar:core21 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake U"
-  bar:core22 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake U"
-  bar:core23 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake U"
-  color:c_core3
-  bar:core31 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake H"
-  bar:core32 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake H"
-  bar:core33 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake H"
-  color:c_core4
-  bar:core41 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake S"
-  bar:core42 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake S"
-  bar:core43 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake S"
-  color:c_core5
-  bar:core51 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake DT"
-  bar:core52 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake DT"
-  bar:core53 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake DT"
-  color:c_core6
-  bar:core61 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake X"
-  bar:core62 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake X"
-  bar:core63 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake X"
-  color:c_core7
-  bar:core71 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake E"
-  bar:core72 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake E"
-  bar:core73 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake E"
-  color:c_core8
-  bar:core81 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake EP"
-  bar:core82 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake EP"
-  bar:core83 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake EP"
-  color:c_core9
-  bar:core91 anchor:from from:09/05/2015 till:11/03/2016 text:"Skylake EX"
-  bar:core92 anchor:from from:11/20/2016 till:11/09/2017 text:"Kaby Lake EX"
-  bar:core93 anchor:from from:11/12/2017 till:02/09/2019 text:"Cannonlake EX"
-</timeline>
-<timeline>
-ImageSize = width:600 height:100
-PlotArea = left:20 right:10 top:10 bottom:25
-TimeAxis = orientation:horizontal
-Period = from:1890 till:2005
-ScaleMajor = unit:year increment:20 start:1900
-ScaleMinor = unit:year increment:10 start:1890
-PlotData =
-  bar:X color:red align:center
-  from:start till:1910 text:"Period 1"
-  from:1920 till:1940 text:"Period 2" color:green
-  from:1950 till:end text:"Period 3"
-  bar:Y color:blue
-  from:start till:1930 text:"Period 1" textcolor:white
-  from:1960 till:end text:"Period 2"
-LineData =
-  at:1935 color:black layer:back
-  at:2000 color:yellow layer:front
-</timeline>
 == Tabl test ==
-== Microarchitecture template ==
-<table style="border: solid 1px #a7d7f9;  width:  375px; float: ri@@@@@ght; margin: 0 10px 10px 10px; text-align: left; font-size: 12px; border-collapse: collapse;">
-<tr><td style="text-align: center;" colspan="3">[[microarchitecture|<span style="text-decoration: none; color: #555555; text-shadow: 0px 2px 3px #222222; font-size: 20pt; font-weight: bold; ">Microarchitectures</span>]]</td></tr>
-<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">'''Paradigms'''</td></tr>
-<tr style="text-align: center; "><td>[[Single-Cycle]]</td><td>[[Multi-Cycle]]</td><td>[[Pipelining]]</td></tr>
-<tr style="text-align: center; "><td>[[Superpipelining]]</td><td>[[Superscalar]]</td><td>[[OOoE]]</td></tr>
-<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">'''Pipeline'''</td></tr>
-<tr style="text-align: center;"><td colspan="3">Prefetching ([[instruction prefetch]])</td></tr>
-<tr style="text-align: center;"><td colspan="3">Fetching ([[instruction fetch]])</td></tr>
-<tr style="text-align: center;"><td colspan="3">Decoding ([[instruction decode]])</td></tr>
-<tr style="text-align: center; "><td>[[micro-operation]]</td><td>[[macro-operation]]</td><td>[[internal operation]]</td></tr>
-<tr style="text-align: center; "><td>[[µOP cache]]</td><td>[[µOP fusion]]</td><td>&nbsp;</td></tr>
-<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">'''Out-of-Order'''</td></tr>
-<tr style="text-align: center; "><td>[[OOoE]]</td><td>[[speculative execution|Speculative]]</td><td>[[pipeline flush|Flushing]]</td></tr>
-<tr style="text-align: center;"><td style="border-top: 1px solid #a7d7f9;" colspan="3">'''Components'''</td></tr>
-</table>