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| − | == Use of Ivy Bridge block diagram for my paper ==
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| − | Hi there,
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| − | Is it possible to change the licensing of the above mentioned diagram, so I can use it in my upcoming paper, citing you and WikiChips? Your help would be greatly appreciated.
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| − | mossaiby (remove this) yahoo (well, this one too) com
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| − | == Use of Broadwell block diagram for dissertation ==
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| − | Hey [[User:At32Hz|At32Hz]],
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| − | I'm writing my dissertation on a particular optimization for group prefetching, and ran my experiments on a Xeon E5-2630 v4. Could I include your Broadwell block diagram svg (https://en.wikichip.org/wiki/File:broadwell_block_diagram.svg) in my dissertation? The dissertation will be freely available to the public, and your diagram would be attributed to you, with a link to WikiChip included. Tried to create a WikiChip account, but was not able to do so. theod AT pdx.edu
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| − | -Ted
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| − | == Use of skylake_block_diagram.svg for my free eBook ==
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| − | Hi, is there any chance I could have your explicit permission to use skylake_block_diagram: https://en.wikichip.org/wiki/File:skylake_block_diagram.svg image for my free pdf book (it will be published under Creative Commons license). More info about the book [https://easyperf.net/blog/2020/06/24/Draft-Of-Perf-Book here]. Thanks!
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| − | -Denis
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| − | '''UPD:''' [[User:At32Hz|At32Hz]], ping. For some reason, I cannot create an account, so sorry for the anonymous writing.
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| − | == Use of Ryzen .svg for Wikipedia article ==
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| − | Hiya, I was just wondering if I could have your explicit permission to use this: https://en.wikichip.org/wiki/File:ryzen_7_1800x.svg image for the Ryzen wikipedia page found here: https://en.wikipedia.org/wiki/Ryzen for the main image. Thanks! [[User:Cautilus|Cautilus]] ([[User talk:Cautilus|talk]]) 05:16, 10 February 2018 (EST)
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| − | : License was changed to "CC BY-SA 3.0". But you might want to use the official "Ryzen" logo for the infobox on there.
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| − | :* AMD's Official Ryzen-related logos can be found here: https://www.amd.com/system/files/2017-08/171089-D_AMD%20Ryzen%20Brand%20Guidelines%20Final.pdf
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| − | : --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 06:46, 10 February 2018 (EST)
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| | == Goldmont == | | == Goldmont == |
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| − | : Yup my bad. It should've been throughput. I've changed it accordingly. --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 09:51, 27 October 2016 (EDT) | + | : right, it should've been throughput. I've changed it to that. --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 09:51, 27 October 2016 (EDT) |
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| − | == 14 nm ==
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| − | "14nm lithography article" You reverted my edit about the sram density, while the Intel slide in the article clearly states that the sram density is higher than that of a logic tall cell. So do you claim the slide is wrong, or do i miss something obvious? <small><span class="autosigned">— Preceding [[WikiChip:Signatures|unsigned]] comment added by [[User:Nible|Nible]] ([[User talk:Nible|talk]] • [[Special:Contributions/Nible|contribs]]) 09:20, Jun 17, 2005 (UTC)</span></small><!-- Template:Unsigned -->
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| − | :: Yea my mistake, I reverted it. I was going through new 14/7nm process info and mixed up some stuff. My bad. --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 18:01, 20 July 2017 (EDT)
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| − | == Intel SoC diagrams ==
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| − | Hey, can you switch the Intel diagrams to correctly correspond to how the cache layout changes in Skylake & Kaby? As they shifted to the sides.--[[User:David|David]] ([[User talk:David|talk]]) 23:24, 7 September 2017 (EDT)
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| − | : Also Sandy Bridge could use one such diagram as well! --[[User:David|David]] ([[User talk:David|talk]]) 23:25, 7 September 2017 (EDT)
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| − | :: Sure thing! --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 23:11, 8 September 2017 (EDT)
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| − | == Please update non-AVX frequencies for 6146 ==
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| − | I'm not at liberty to share the information, but I have an Intel document with frequencies for the Intel Xeon Gold 6146 processor. They differ from what is at [[intel/xeon_gold/6146#Frequencies]].
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| − | Discrepancies are for some of the non-AVX frequencies; my data for both sets of AVX frequencies are the same as yours.
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| − | From the edit history for that page, it appears that you entered those frequencies.
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| − | Would you please check your sources and update the frequencies as appropriate? Thanks! <small><span class="autosigned">— Preceding [[WikiChip:Signatures|unsigned]] comment added by [[User:ChuckEdN|ChuckEdN]] ([[User talk:ChuckEdN|talk]] • [[Special:Contributions/ChuckEdN|contribs]]) </span></small><!-- Template:Unsigned -->
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| − | :Hey Chuck,
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| − | : I follow the published frequencies from Intel's own datasheet, [https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-scalable-spec-update.pdf you can find them here]. I screenshot the appropriate row for the 6146 here https://i.imgur.com/xnvZD6s.png
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| − | : That says the frequencies are "4.2, 4.2, 4.1, 4.1, 4.0, 4.0, 4.0, 4.0, 3.9, 3.9, 3.9, 3.9". which are the same ones we have for the [[Xeon Gold 6146]]. Are you saying those values are wrong? --[[User:At32Hz|At32Hz]] ([[User talk:At32Hz|talk]]) 13:18, 15 September 2017 (EDT)
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| − | Chuck says:
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| − | Sure enough, there's a discrepancy between the Intel site you cited and the Intel documentation I have. I'll see what I can find out and get back here. <small><span class="autosigned">— Preceding [[WikiChip:Signatures|unsigned]] comment added by [[User:ChuckEdN|ChuckEdN]] ([[User talk:ChuckEdN|talk]] • [[Special:Contributions/ChuckEdN|contribs]]) </span></small><!-- Template:Unsigned -->
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