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Editing 130 nm lithography process
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|1st Production | |1st Production | ||
|Type | |Type | ||
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|Metal Layers | |Metal Layers | ||
| | | | ||
|Contacted Gate Pitch | |Contacted Gate Pitch | ||
|Interconnect Pitch (M1P) | |Interconnect Pitch (M1P) | ||
− | |SRAM bit cell | + | |SRAM bit cell |
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}} | }} | ||
{{scrolling table/mid}} | {{scrolling table/mid}} | ||
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| colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | | | colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2002 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | 2001 || colspan="2" | | ||
|- style="text-align: center;" | |- style="text-align: center;" | ||
− | | colspan="8" | Bulk || colspan=" | + | | colspan="8" | Bulk || colspan="4" | PDSOI || colspan="10" | Bulk |
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|- style="text-align: center;" | |- style="text-align: center;" | ||
| colspan="2" | 6 || colspan="2" | || colspan="2" | || colspan="2" | || colspan="2" | 8 || colspan="2" | 8 || colspan="2" | || colspan="2" | 5 || colspan="2" | 7 || colspan="2" | 6 || colspan="2" | 7 | | colspan="2" | 6 || colspan="2" | || colspan="2" | || colspan="2" | || colspan="2" | 8 || colspan="2" | 8 || colspan="2" | || colspan="2" | 5 || colspan="2" | 7 || colspan="2" | 6 || colspan="2" | 7 | ||
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! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ | ! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ !! Value !! [[180 nm]] Δ | ||
|- | |- | ||
− | | 319 nm || 0.66x || 310 | + | | 319 nm || 0.66x || 310 nm || ?x || 350 nm || ?x || ? nm || ?x || 350 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x |
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|- | |- | ||
− | | | + | | 345 nm || 0.69x || 340 nm || ?x || 350 nm || ?x || ? nm || ?x || 320 nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x || ?nm || ?x |
|- | |- | ||
− | | 2. | + | | 2.0 µm<sup>2</sup> || 0.36x || 2.14 µm<sup>2</sup> || 0.46x || ? µm<sup>2</sup> || ?x || 1.98 µm<sup>2</sup> || 0.47x || 1.8 µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x || ? µm<sup>2</sup> || ?x |
{{scrolling table/end}} | {{scrolling table/end}} | ||
=== Design Rules === | === Design Rules === | ||
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== 130 nm Microprocessors== | == 130 nm Microprocessors== | ||
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* AMD | * AMD | ||
** {{amd|Athlon 64}} | ** {{amd|Athlon 64}} | ||
** {{amd|Athlon MP}} | ** {{amd|Athlon MP}} | ||
** {{amd|Athlon XP}} | ** {{amd|Athlon XP}} | ||
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** {{amd|FX}} | ** {{amd|FX}} | ||
** {{amd|Opteron}} | ** {{amd|Opteron}} | ||
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* IBM | * IBM | ||
** {{ibm|Power4+}} | ** {{ibm|Power4+}} | ||
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** {{intel|Pentium M}} | ** {{intel|Pentium M}} | ||
** {{intel|Pentium 4 Extreme Edition}} | ** {{intel|Pentium 4 Extreme Edition}} | ||
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* SGI | * SGI | ||
** {{sgi|R14000}} | ** {{sgi|R14000}} | ||
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** {{sun|UltraSPARC III Cu}} | ** {{sun|UltraSPARC III Cu}} | ||
** {{sun|UltraSPARC IIIi}} | ** {{sun|UltraSPARC IIIi}} | ||
− | + | * HAL (Fujitsu) | |
− | * | + | ** {{hal|SPARC64 V}} |
− | ** {{ | + | * Ambric |
− | + | ** {{ambric|am2000}} | |
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− | * | ||
− | ** {{ | ||
{{expand list}} | {{expand list}} | ||
== 130 nm Microarchitectures == | == 130 nm Microarchitectures == | ||
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{{expand list}} | {{expand list}} | ||
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