From WikiChip
Editing qualcomm/msm6xxx/msm6225 (section)
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Facts about "MSM6225 - Qualcomm"
base frequency | 146 MHz (0.146 GHz, 146,000 kHz) + |
bus type | AMBA 2 + |
chipset | MSM6xxx + |
core count | 1 + |
core name | ARM926EJ-S + |
designer | Qualcomm + and ARM Holdings + |
dsp | QDSP4000 + |
dsp base frequency | 40 MHz (0.04 GHz, 40,000 kHz) + |
family | MSM6xxx + |
first announced | February 23, 2004 + |
first launched | April 14, 2005 + |
full page name | qualcomm/msm6xxx/msm6225 + |
has 2g support | true + |
has 3g support | true + |
has gprs support | true + |
has gsm support | true + |
has locked clock multiplier | true + |
has umts support | true + |
has wcdma support | true + |
instance of | microprocessor + |
l1d$ description | 4-way set associative + |
l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
ldate | April 14, 2005 + |
main image | + |
manufacturer | TSMC + and IBM + |
market segment | Mobile + and Embedded + |
max cpu count | 1 + |
max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
max memory address | 0xFFFFFFFF + |
microarchitecture | ARM9 + |
model number | MSM6225 + |
name | Qualcomm MSM6225 + |
part of | Value Platform + |
process | 90 nm (0.09 μm, 9.0e-5 mm) + |
series | MSM + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 1 + |