From WikiChip
Editing intel/xeon e5/e5-2699a v4 (section)
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Facts about "Xeon E5-2699A v4 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel +, Xeon E5-2699A v4 - Intel + and Xeon E5-2699A v4 - Intel#io + |
base frequency | 2,400 MHz (2.4 GHz, 2,400,000 kHz) + |
bus links | 2 + |
bus rate | 9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) + |
bus speed | 4,800 MHz (4.8 GHz, 4,800,000 kHz) + |
bus type | QPI + |
chipset | C610 Series + |
clock multiplier | 24 + |
core count | 22 + |
core family | 6 + |
core model | 4F + |
core name | Broadwell EP + |
core stepping | B0 + |
core voltage | 1.82 V (18.2 dV, 182 cV, 1,820 mV) + |
cpuid | 406F1 + |
designer | Intel + |
die area | 456.12 mm² (0.707 in², 4.561 cm², 456,120,000 µm²) + |
family | Xeon E5 + |
first announced | October 25, 2016 + |
first launched | October 25, 2016 + |
full page name | intel/xeon e5/e5-2699a v4 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has extended page tables support | true + |
has feature | Trusted Execution Technology +, Transactional Synchronization Extensions +, Intel vPro Technology +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Extended Page Tables +, Turbo Boost Technology 1.0 + and Turbo Boost Max Technology 3.0 + |
has intel enhanced speedstep technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost max technology 3 0 | true + |
has intel turbo boost technology 1 0 | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
io voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
io voltage tolerance | 3% + |
l1d$ description | 8-way set associative + |
l1d$ size | 704 KiB (720,896 B, 0.688 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 704 KiB (720,896 B, 0.688 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 5.5 MiB (5,632 KiB, 5,767,168 B, 0.00537 GiB) + |
l3$ description | 20-way set associative + |
l3$ size | 55 MiB (56,320 KiB, 57,671,680 B, 0.0537 GiB) + |
ldate | October 25, 2016 + |
manufacturer | Intel + |
market segment | Server + |
max cpu count | 2 + |
max memory | 1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) + |
max pcie lanes | 40 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Broadwell + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | E5-2699A v4 + |
name | Xeon E5-2699A v4 + |
part number | CM8066003197800 + |
platform | Grantley EP 2S + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 4,938.00 (€ 4,444.20, £ 3,999.78, ¥ 510,243.54) + |
s-spec | SR30Y + |
s-spec (qs) | QLPM + |
series | E5-2000 + |
smp max ways | 2 + |
tdp | 145 W (145,000 mW, 0.194 hp, 0.145 kW) + |
technology | CMOS + |
thread count | 44 + |
transistor count | 7,200,000,000 + |
turbo frequency (10 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (11 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (12 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (13 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (14 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (15 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (16 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (17 cores) | 3,000 MHz + |
turbo frequency (18 cores) | 3,000 MHz + |
turbo frequency (19 cores) | 3,000 MHz + |
turbo frequency (1 core) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (20 cores) | 3,000 MHz + |
turbo frequency (21 cores) | 3,000 MHz + |
turbo frequency (22 cores) | 3,000 MHz + |
turbo frequency (2 cores) | 3,600 MHz (3.6 GHz, 3,600,000 kHz) + |
turbo frequency (3 cores) | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
turbo frequency (4 cores) | 3,300 MHz (3.3 GHz, 3,300,000 kHz) + |
turbo frequency (5 cores) | 3,200 MHz (3.2 GHz, 3,200,000 kHz) + |
turbo frequency (6 cores) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
turbo frequency (7 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (8 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
turbo frequency (9 cores) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |