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Editing renesas/r-car/m3 (sip) (section)

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Facts about "R-Car M3 (SiP) - Renesas"
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R-Car M3 (SiP) - Renesas#package +
core count7 +
core nameCortex-A53 +, Cortex-A57 + and Cortex-R7 +
core voltage0.9 V (9 dV, 90 cV, 900 mV) +
designerARM Holdings + and Renesas +
familyR-Car +
first announcedOctober 19, 2016 +
first launchedOctober 2016 +
full page namerenesas/r-car/m3 (sip) +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuPowerVR GX6250 +
integrated gpu designerImagination Technologies +
io voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
isaARMv8 +
isa familyARM +
l1$ size480 KiB (491,520 B, 0.469 MiB) +
l1d$ size224 KiB (229,376 B, 0.219 MiB) +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
ldateOctober 2016 +
main imageFile:r-car m3 (sip).png +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max memory bandwidth11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels2 +
microarchitectureCortex-A53 +, Cortex-A57 + and Cortex-R7 +
model numberM3 (SiP) +
nameR-Car M3 (SiP) +
packageFCBGA-1255 +
part numberR8J77960 +
process16 nm (0.016 μm, 1.6e-5 mm) +
series3rd Gen +
smp max ways1 +
supported memory typeLPDDR4-3200 +
technologyCMOS +
thread count7 +
word size64 bit (8 octets, 16 nibbles) +