Editing princeton/piton (section)

==== Cache ====
Pitons uses a distributed write-back [[L2$]] model that implements a directory-based [[MESI protocol]] - adhering to OpenSPARC's total store order (TSO) model. Each tile contains 64 KB slice of the L2 cache and an attached cache directory. The L2 cache is inclusive of both the L1.5$ and the L1$. Note that the L1.5 is called as such because the [[OpenSPARC T1]] core already implements an 8 KB [[L1d$]] and 16 KB [[L1i$]] which are tightly coupled with the pipeline and was thus only modified to work in a scaleable multi-core environment. The L1.5$ acts as a middleman between the OpenSPARC T1's  crossbar protocol and the Piton's NoC. It relays requests and replies to and from the core through CCX.

{{cache info
|l1i cache=
|l1i break=
|l1i desc=
|l1i extra=
|l1d cache=200 KiB
|l1d break=25x8 KiB
|l1d desc=4-way set associative
|l1d extra=(write-back, per tile)
|l2 cache=1.5 MiB
|l2 break=25x64 KiB
|l2 desc=4-way set associative
|l2 extra=(per tile)
|l3 cache=
|l3 break=
|l3 desc=16-way set associative
|l3 extra=
}}
base frequency	1,000 MHz (1 GHz, 1,000,000 kHz) +
bus rate	2,800 MT/s (2.8 GT/s, 2,800,000 kT/s) +
bus speed	350 MHz (0.35 GHz, 350,000 kHz) +
clock multiplier	2.85 +
core count	25 +
core voltage	0.9 V (9 dV, 90 cV, 900 mV) +
designer	Princeton +
die area	36 mm² (0.0558 in², 0.36 cm², 36,000,000 µm²) +
die length	6 mm (0.6 cm, 0.236 in, 6,000 µm) +
die width	6 mm (0.6 cm, 0.236 in, 6,000 µm) +
first announced	August 23, 2016 +
full page name	princeton/piton +
instance of	microprocessor +
l1d$ description	4-way set associative +
l1d$ size	200 KiB (204,800 B, 0.195 MiB) +
l2$ description	4-way set associative +
l2$ size	1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
ldate	August 23, 2016 +
main image	+
main image caption	Piton face +
manufacturer	IBM +
market segment	Server +
max cpu count	20,000 +
name	Piton +
process	32 nm (0.032 μm, 3.2e-5 mm) +
smp max ways	20,000 +
technology	CMOS +
thread count	50 +
transistor count	460,000,000 +
word size	64 bit (8 octets, 16 nibbles) +