Editing intel/xeon silver/4215 (section)

== Expansions ==
{{expansions main
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{{expansions entry
|type=PCIe
|pcie revision=3.0
|pcie lanes=48
|pcie config=1x16
|pcie config 2=x8
|pcie config 3=x4
}}
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Silver 4215 - Intel#pcie +
base frequency	2,500 MHz (2.5 GHz, 2,500,000 kHz) +
chipset	Lewisburg +
clock multiplier	25 +
core count	8 +
core family	6 +
core name	Cascade Lake SP +
core stepping	L1 + and L0 +
designer	Intel +
family	Xeon Silver +
first announced	April 2, 2019 +
first launched	April 2, 2019 +
full page name	intel/xeon silver/4215 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Extended Page Tables +, Transactional Synchronization Extensions +, Intel VT-d + and Deep Learning Boost +
has intel deep learning boost	true +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	512 KiB (524,288 B, 0.5 MiB) +
l1d$ description	8-way set associative +
l1d$ size	256 KiB (262,144 B, 0.25 MiB) +
l1i$ description	8-way set associative +
l1i$ size	256 KiB (262,144 B, 0.25 MiB) +
l2$ description	16-way set associative +
l2$ size	8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
l3$ description	11-way set associative +
l3$ size	11 MiB (11,264 KiB, 11,534,336 B, 0.0107 GiB) +
ldate	April 2, 2019 +
main image	+
manufacturer	Intel +
market segment	Server +
max case temperature	350.15 K (77 °C, 170.6 °F, 630.27 °R) +
max cpu count	2 +
max memory	1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth	107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) +
max memory channels	6 +
microarchitecture	Cascade Lake +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	4215 +
name	Xeon Silver 4215 +
package	FCLGA-3647 +
part number	CD8069504212701 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 794.00 (€ 714.60, £ 643.14, ¥ 82,044.02) +
release price (tray)	$ 794.00 (€ 714.60, £ 643.14, ¥ 82,044.02) +
s-spec	SRFBA +
s-spec (qs)	QRG7 +
series	4200 +
smp interconnect	UPI +
smp interconnect links	2 +
smp interconnect rate	9.6 GT/s +
smp max ways	2 +
socket	Socket P + and LGA-3647 +
supported memory type	DDR4-2400 +
tdp	85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technology	CMOS +
thread count	16 +
turbo frequency (1 core)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +