Editing alchemy/au1000-266mcc (section)

== Memory controller ==
Au1000 processors integrate two independent memory controllers, a DRAM controller which supports SDRAM, {{abbr|SMROM}}, and SyncFlash, and a static bus controller which supports SRAM, ROM, Flash memory, {{abbr|PCMCIA}}/CompactFlash devices, and I/O peripherals such as an external LCD controller. SDRAM runs at one half of the frequency of the internal 32-bit System Bus, which runs at up to one half of the CPU core frequency. 

{{memory controller
|type=SDR-133
|ecc=No
|controllers=1
|channels=1
|max mem=192 MiB
|width=32 bit
|max bandwidth=0.266 GB/s
}}
base frequency	266 MHz (0.266 GHz, 266,000 kHz) +
core count	1 +
core stepping	DA +, HA +, HB +, HC + and HD +
core voltage	1.5 V (15 dV, 150 cV, 1,500 mV) +
core voltage tolerance	5% +
designer	Alchemy +
family	Alchemy +
first announced	June 13, 2000 +
first launched	February 2001 +
full page name	alchemy/au1000-266mcc +
has ecc memory support	false +
instance of	microprocessor +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) +
isa	MIPS32 +
l1$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description	4-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
ldate	February 2001 +
manufacturer	TSMC +
market segment	Embedded +
max case temperature	358.15 K (85 °C, 185 °F, 644.67 °R) +
max cpu count	1 +
max memory	192 MiB (196,608 KiB, 201,326,592 B, 0.188 GiB, 1.831055e-4 TiB) +
max memory bandwidth	0.248 GiB/s (253.677 MiB/s, 0.266 GB/s, 266 MB/s, 2.419256e-4 TiB/s, 2.66e-4 TB/s) +
max memory channels	1 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Au1 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Au1000-266MCC +
name	Alchemy Au1000-266MCC +
part number	Au1000-266MCC +
process	180 nm (0.18 μm, 1.8e-4 mm) +
smp max ways	1 +
supported memory type	SDR-133 +
tdp (typical)	0.3 W (300 mW, 4.023e-4 hp, 3.0e-4 kW) +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +