Editing qualcomm/msm6xxx/msm6150 (section)

== Cache ==
{{main|arm holdings/microarchitectures/ARM7#Memory_Hierarchy|l1=ARM9 § Cache}}
{{cache info
|l1i cache=16 KiB
|l1i break=1x16 KiB
|l1i desc=4-way set associative
|l1i extra=
|l1d cache=16 KiB
|l1d break=1x16 KiB
|l1d desc=4-way set associative
|l1d extra=
}}
base frequency	225 MHz (0.225 GHz, 225,000 kHz) +
bus type	AMBA 2 +
chipset	MSM6xxx +
core count	1 +
core name	ARM926EJ-S +
designer	Qualcomm + and ARM Holdings +
dsp	QDSP4000 +
dsp base frequency	73 MHz (0.073 GHz, 73,000 kHz) +
family	MSM6xxx +
first announced	September 16, 2003 +
first launched	August 2004 +
full page name	qualcomm/msm6xxx/msm6150 +
has 2g support	true +
has 3g support	true +
has cdma2000 1x support	true +
has cdma2000 support	true +
has cdmaone support	true +
has is-95a support	true +
has is-95b support	true +
has locked clock multiplier	true +
instance of	microprocessor +
l1d$ description	4-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
ldate	August 2004 +
main image	+
manufacturer	TSMC + and IBM +
market segment	Mobile + and Embedded +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory address	0xFFFFFFFF +
microarchitecture	ARM9 +
model number	MSM6150 +
name	Qualcomm MSM6150 +
part of	Enhanced Multimedia Platform +
process	130 nm (0.13 μm, 1.3e-4 mm) +
series	MSM +
smp max ways	1 +
technology	CMOS +
thread count	1 +