Editing intel/core i7/i7-720qm (section)

== Cache ==
{{main|intel/microarchitectures/nehalem#Memory_Hierarchy|l1=Nehalem § Cache}}
{{cache size
|l1 cache=256 KiB
|l1i cache=128 KiB
|l1i break=4x32 KiB
|l1i desc=4-way set associative
|l1i policy=write-back
|l1d cache=128 KiB
|l1d break=4x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=1 MiB
|l2 break=4x256 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=6 MiB
|l3 break=4x1.5 MiB
|l3 desc=16-way set associative
|l3 policy=write-back
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i7-720QM - Intel#io +
base frequency	1,599.99 MHz (1.6 GHz, 1,599,990 kHz) +
bus rate	2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus type	DMI 1.0 +
chipset	Ibex Peak +
clock multiplier	12 +
core count	4 +
core family	6 +
core model	30 +
core name	Clarksfield +
core stepping	B1 +
core voltage	1.075 V (10.75 dV, 107.5 cV, 1,075 mV) +
core voltage tolerance	0.325 V +
designer	Intel +
die area	296 mm² (0.459 in², 2.96 cm², 296,000,000 µm²) +
family	Core i7 +
first announced	June 24, 2009 +
first launched	September 23, 2009 +
full page name	intel/core i7/i7-720qm +
has ecc memory support	false +
has extended page tables support	true +
has feature	Hyper-Threading Technology +, Turbo Boost Technology 1.0 +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 1 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
instance of	microprocessor +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	4-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	8-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	16-way set associative +
l3$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
ldate	September 23, 2009 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth	19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Nehalem +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i7-720QM +
name	Intel Core i7-720QM +
part number	BX80607I7720QM + and BY80607002907AH +
platform	Calpella +
process	45 nm (0.045 μm, 4.5e-5 mm) +
release price	$ 364.00 (€ 327.60, £ 294.84, ¥ 37,612.12) +
s-spec	SLBLY +
smp max ways	1 +
supported memory type	DDR3-1333 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technology	CMOS +
thread count	8 +
transistor count	774,000,000 +
turbo frequency (1 core)	2,799.99 MHz (2.8 GHz, 2,799,990 kHz) +
turbo frequency (2 cores)	2,399.99 MHz (2.4 GHz, 2,399,990 kHz) +
turbo frequency (3 cores)	1,733.33 MHz (1.733 GHz, 1,733,330 kHz) +
turbo frequency (4 cores)	1,733.33 MHz (1.733 GHz, 1,733,330 kHz) +
word size	64 bit (8 octets, 16 nibbles) +