Editing amd/duron/dm600avs1b (section)

== Cache ==
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
{{cache info
|l1i cache=64 KiB
|l1i break=1x64 KiB
|l1i desc=2-way set associative
|l1i extra=
|l1d cache=64 KiB
|l1d break=1x64 KiB
|l1d desc=2-way set associative
|l1d extra=
|l2 cache=64 KiB
|l2 break=1x64 KiB
|l2 desc=16-way set associative
|l2 extra=
|l3 cache=
|l3 break=
|l3 desc=
|l3 extra=
}}
base frequency	600 MHz (0.6 GHz, 600,000 kHz) +
bus rate	200 MT/s (0.2 GT/s, 200,000 kT/s) +
bus speed	100 MHz (0.1 GHz, 100,000 kHz) +
bus type	FSB +
clock multiplier	6 +
core count	1 +
core family	6 +
core model	3 +
core name	Spitfire +
core stepping	0 +
core voltage	1.4 V (14 dV, 140 cV, 1,400 mV) +
core voltage tolerance	0.1 V +
cpuid	630 +
designer	AMD +
die area	100 mm² (0.155 in², 1 cm², 100,000,000 µm²) +
family	Duron +
first announced	January 15, 2001 +
first launched	January 15, 2001 +
full page name	amd/duron/dm600avs1b +
has feature	Halt State + and Sleep State +
has locked clock multiplier	true +
instance of	microprocessor +
l1d$ description	2-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	2-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
ldate	January 15, 2001 +
manufacturer	AMD +
market segment	Mobile +
max case temperature	368.15 K (95 °C, 203 °F, 662.67 °R) +
max cpu count	1 +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitecture	K7 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Duron 600 +
name	Duron 600 +
part number	DM600AVS1B +
process	180 nm (0.18 μm, 1.8e-4 mm) +
series	Duron Mobile +
smp max ways	1 +
technology	CMOS +
thread count	1 +
transistor count	25,000,000 +
word size	32 bit (4 octets, 8 nibbles) +