Editing freescale/qoriq/p2020

{{freescale title|QorIQ P2020}}
{{chip
|name=P2020
|no image=Yes
|designer=Freescale
|manufacturer=IBM
|model number=P2020
|market=Networking
|market 2=Embedded
|first announced=June 16, 2008
|first launched=2009
|family=QorIQ
|series=P2
|frequency=1,200 MHz
|isa=Power ISA v2.03
|isa family=Power
|microarch=e500
|core name=e500 v2
|process=45 nm
|technology=CMOS
|word size=32 bit
|core count=2
|thread count=2
|power=8 W
|tjunc min=0 °C
|tjunc max=125 °C
|package module 1={{packages/freescale/te-pbga-ii-689}}
}}
'''QorIQ P2020''' is a {{arch|32}} embedded [[dual-core]] [[POWER]] microprocessor introduced by [[Freescale]] in [[2008]]. This networking/embedded processor, which is based on the {{freescale|e500|l=arch}} microarchitecture and is fabricated on a [[45 nm SOI process]], operates at 1.2 GHz and supports 64-bit DDR3-800 memory.

== Cache ==
{{main|freescale/microarchitectures/e500#Memory_Hierarchy|l1=e500 § Cache}}
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=2x32 KiB
|l1i desc=8-way set associative
|l1d cache=64 KiB
|l1d break=2x32 KiB
|l1d desc=8-way set associative
|l1d policy=
|l2 cache=512 KiB
|l2 break=1x512 KiB
|l2 desc=8-way set associative
|l2 policy=Write-through
}}

== Memory controller ==
{{memory controller
|type=DDR3-800
|ecc=Yes
|controllers=1
|channels=1
|width=64 bit
|max bandwidth=5.96 GiB/s
|bandwidth schan=5.96 GiB/s
}}

== Expansions ==
* 3x 10/100/1000 Eithernet with SGMII
* 3x PCIe 1.0a controllers with 2 SerDes
* 1x USB 2.0
* SD/MMC
* SPI
* 2x I2C
* UART
* SEC 3.1 Security Acceleration

== Block Diagram ==
: [[File:qoriq p2010 block diagram.png|800px]]

== Documents ==
* [[:File:QorIQ P2.pdf|QorIQ P2 Series Product Brief]]
* [[:File:P2 Family App Bro.pdf|P2 Platform Series]]
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	QorIQ P2020 - Freescale#package +
base frequency	800 MHz (0.8 GHz, 800,000 kHz) +, 1,200 MHz (1.2 GHz, 1,200,000 kHz) + and 1,333 MHz (1.333 GHz, 1,333,000 kHz) +
core count	2 +
core name	e500 v2 +
designer	Freescale +
family	QorIQ +
first announced	June 16, 2008 +
first launched	2009 +
full page name	freescale/qoriq/p2020 +
has ecc memory support	true +
instance of	microprocessor +
isa	Power ISA v2.03 +
isa family	Power +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	8-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
last order	2023 +
ldate	2009 +
manufacturer	IBM +
market segment	Networking + and Embedded +
max junction temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
max memory bandwidth	5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) +
max memory channels	1 +
microarchitecture	e500 +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
model number	P2020 +
name	P2020 +
package	TE-PBGA-II-689 +
power dissipation	8 W (8,000 mW, 0.0107 hp, 0.008 kW) +
process	45 nm (0.045 μm, 4.5e-5 mm) +
series	P2 +
supported memory type	DDR3-800 +
technology	CMOS +
thread count	2 +
word size	32 bit (4 octets, 8 nibbles) +