Editing intel/xeon gold/6161

{{intel title|Xeon Gold 6161}}
{{chip
|future=Yes
|name=Xeon Gold 6161
|no image=Yes
|designer=Intel
|manufacturer=Intel
|model number=6161
|market=Server
|family=Xeon Gold
|series=6100
|locked=Yes
|frequency=2,200 MHz
|turbo frequency1=3,000 MHz
|bus type=DMI 3.0
|bus links=4
|bus rate=8 GT/s
|clock multiplier=22
|isa=x86-64
|isa family=x86
|microarch=Skylake (server)
|platform=Purley
|chipset=Lewisburg
|core name=Skylake SP
|core family=6
|core stepping=H0
|process=14 nm
|technology=CMOS
|die area=<!-- XX mm² -->
|word size=64 bit
|core count=22
|thread count=44
|max cpus=4
|v core tolerance=<!-- OR ... -->
|v io 2=<!-- OR ... -->
|tdp=165 W
|temp min=<!-- use TJ/TC whenever possible instead -->
|tjunc min=<!-- .. °C -->
|package name 1=intel,fclga_3647
|package module 2=<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
|turbo frequency=Yes
}}
'''Xeon Gold 6161''' is a {{arch|64}} [[x86]] high-performance server [[docosa-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6161 operates at 2.2 GHz with a TDP of 165 W and a {{intel|Turbo Boost|turbo frequency}} of 3 GHz.


{{unknown features}}

== Cache ==
{{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
{{cache size
|l1 cache=1.375 MiB
|l1i cache=704 KiB
|l1i break=22x32 KiB
|l1i desc=8-way set associative
|l1d cache=704 KiB
|l1d break=22x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=22 MiB
|l2 break=22x1 MiB
|l2 desc=16-way set associative
|l2 policy=write-back
|l3 cache=30.25 MiB
|l3 break=22x1.375 MiB
|l3 desc=11-way set associative
|l3 policy=write-back
}}

== Memory controller ==
{{memory controller
|type=DDR4-2666
|ecc=Yes
|max mem=
|controllers=1
|channels=6
|max bandwidth=119.21 GiB/s
|bandwidth schan=19.89 GiB/s
|bandwidth dchan=39.72 GiB/s
|bandwidth qchan=79.47 GiB/s
|bandwidth hchan=119.21 GiB/s
}}

== Features == 
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=Yes
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=Yes
|sse42=Yes
|sse4a=No
|avx=Yes
|avx2=Yes

|abm=Yes
|tbm=No
|bmi1=Yes
|bmi2=Yes
|fma3=Yes
|fma4=No
|aes=Yes
|rdrand=Yes
|sha=No
|xop=No
|adx=Yes
|clmul=Yes
|f16c=Yes
|tbt1=No
|tbt2=No
|tbmt3=No
|bpt=No
|eist=Yes
|sst=No
|flex=No
|fastmem=No
|isrt=No
|sba=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=Yes
|txt=No
|ht=Yes
|vpro=Yes
|vtx=Yes
|vtd=Yes
|ept=Yes
|mpx=Yes
|sgx=No
|securekey=No
|osguard=Yes
|3dnow=No
|e3dnow=No
|smartmp=No
|powernow=No
|amdvi=No
|amdv=No
|rvi=No
|smt=No
|sensemi=No
|xfr=No
}}

[[Category:microprocessor models by intel based on skylake extreme core count die]]
base frequency	2,200 MHz (2.2 GHz, 2,200,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Lewisburg +
clock multiplier	22 +
core count	22 +
core family	6 +
core name	Skylake SP +
core stepping	H0 +
designer	Intel +
family	Xeon Gold +
full page name	intel/xeon gold/6161 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Enhanced SpeedStep Technology +, Extended Page Tables +, Hyper-Threading Technology +, Intel VT-d +, Intel VT-x +, Intel vPro Technology +, Memory Protection Extensions +, OS Guard + and Transactional Synchronization Extensions +
has intel enhanced speedstep technology	true +
has intel supervisor mode execution protection	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	1,408 KiB (1,441,792 B, 1.375 MiB) +
l1d$ description	8-way set associative +
l1d$ size	704 KiB (720,896 B, 0.688 MiB) +
l1i$ description	8-way set associative +
l1i$ size	704 KiB (720,896 B, 0.688 MiB) +
l2$ description	16-way set associative +
l2$ size	22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) +
l3$ description	11-way set associative +
l3$ size	30.25 MiB (30,976 KiB, 31,719,424 B, 0.0295 GiB) +
ldate	3000 +
manufacturer	Intel +
market segment	Server +
max cpu count	4 +
max memory bandwidth	119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels	6 +
microarchitecture	Skylake (server) +
model number	6161 +
name	Xeon Gold 6161 +
package	FCLGA-3647 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
series	6100 +
smp max ways	4 +
socket	LGA-3647 + and Socket P +
supported memory type	DDR4-2666 +
tdp	165 W (165,000 mW, 0.221 hp, 0.165 kW) +
technology	CMOS +
thread count	44 +
turbo frequency (1 core)	3,000 MHz (3 GHz, 3,000,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +