From WikiChip
Editing intel/microarchitectures/goldmont
Revision as of 17:44, 1 August 2018 by 192.55.54.41 (talk) (New instructions)

Warning: You are editing an out-of-date revision of this page. If you save it, any changes made since this revision will be lost.

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)
codenameGoldmont +
core count2 +, 4 +, 8 +, 12 + and 16 +
designerIntel +
first launchedAugust 30, 2016 +
full page nameintel/microarchitectures/goldmont +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameGoldmont +
pipeline stages (max)14 +
pipeline stages (min)12 +
process14 nm (0.014 μm, 1.4e-5 mm) +