Editing intel/xeon e5/e5-2687w v4

{{intel title|Xeon E5-2687W v4}}
{{mpu
|name=Xeon E5-2687W v4
|no image=Yes
|designer=Intel
|manufacturer=Intel
|model number=E5-2687W v4
|part number=CM8066002042802
|part number 2=BX80660E52687V4
|s-spec=SR2NA
|s-spec qs=QK99
|market=Server
|first announced=June 20, 2016
|first launched=June 20, 2016
|release price=$2141.00
|family=Xeon E5
|series=E5-2600
|locked=Yes
|frequency=3,000 MHz
|turbo frequency1=3,500 MHz
|turbo frequency2=3,500 MHz
|turbo frequency3=3,300 MHz
|turbo frequency4=3,200 MHz
|turbo frequency5=3,200 MHz
|turbo frequency6=3,200 MHz
|turbo frequency7=3,200 MHz
|turbo frequency8=3,200 MHz
|turbo frequency9=3,200 MHz
|turbo frequency10=3,200 MHz
|turbo frequency11=3,200 MHz
|turbo frequency12=3,200 MHz
|bus type=QPI
|bus speed=4,800 MHz
|bus links=2
|bus rate=9.6 GT/s
|clock multiplier=30
|cpuid=406F1
|isa=x86-64
|isa family=x86
|microarch=Broadwell
|platform=Grantley EP 2S
|chipset=C610 Series
|core name=Broadwell EP
|core family=6
|core model=4F
|core stepping=M0
|process=14 nm
|transistors=4,700,000,000
|technology=CMOS
|word size=64 bit
|core count=12
|thread count=24
|max cpus=2
|max memory=1,536 GiB
|v core=1.82 V
|v io=1.2 V
|v io tolerance=3%
|tdp=160 W
|tcase min=0 °C
|tcase max=76 °C
|tstorage min=-25 °C
|tstorage max=125 °C
|turbo frequency=Yes
|die size=306.18 mm²
|packaging=Yes
|package 0=FCLGA-2011-v3
|package 0 type=FCLGA
|package 0 pins=2011
|package 0 pitch=0.8814 mm
|package 0 width=52.5 mm
|package 0 length=45.0 mm
|package 0 height=5.316 mm
|socket 0=LGA-2011-v3
|socket 0 type=LGA
}}
The '''Xeon E5-2687W v4''' is a {{arch|64}} [[dodeca-core]] [[x86]] microprocessor introduced by [[Intel]] in 2016. This server MPU is designed for 2S workstation environments. Operating at 3 GHz with a {{intel|turbo boost}} frequency of 3.5 GHz for a single active core, this MPU has a TDP of 160 W and is manufactured on a [[14 nm process]] (based on {{intel|Broadwell|l=arch}}).

== Cache ==
{{main|intel/microarchitectures/broadwell#Memory_Hierarchy|l1=Broadwell § Cache}}
{{cache info
|l1i cache=384 KiB
|l1i break=12x32 KiB
|l1i desc=8-way set associative
|l1i extra=(per core, write-back)
|l1d cache=384 KiB
|l1d break=12x32 KiB
|l1d desc=8-way set associative
|l1d extra=(per core, write-back)
|l2 cache=3 MiB
|l2 break=12x256 KiB
|l2 desc=8-way set associative
|l2 extra=(per core, write-back)
|l3 cache=30 MiB
|l3 break=12x2.5 MiB
|l3 desc=20-way set associative
|l3 extra=(shared, per core, write-back)
}}

== Graphics ==
This microprocessor has no [[integrated graphics processing unit]].

== Memory controller ==
{{integrated memory controller
| type               = DDR4-2400
| controllers        = 1
| channels           = 4
| ecc support        = Yes
| max bandwidth      = 71.53 GiB/s
| bandwidth schan    = 17.88 GiB/s
| bandwidth dchan    = 35.76 GiB/s
| max memory         = 1,536 GiB
| pae                = 46 bit
}}

== Expansions ==
{{mpu expansions
| pcie revision      = 3.0
| pcie lanes         = 40
| pcie config        = x4
| pcie config 1      = x8
| pcie config 2      = x16
}}

== Features == 
{{mpu features
| em64t       = Yes
| nx          = Yes
| txt         = Yes
| tsx         = Yes
| vpro        = Yes
| ht          = Yes
| tbt1        = 
| tbt2        = Yes
| tbmt3       = 
| bpt         = 
| vt-x        = Yes
| vt-d        = Yes
| ept         = Yes
| mmx         = Yes
| sse         = Yes
| sse2        = Yes
| sse3        = Yes
| ssse3       = Yes
| sse4.1      = Yes
| sse4.2      = Yes
| aes         = Yes
| pclmul       = Yes
| avx         = Yes
| avx2        = Yes
| bmi         = Yes
| bmi1        = Yes
| bmi2        = Yes
| f16c        = Yes
| fma3        = Yes
| mpx         = 
| sgx         = 
| eist        = Yes
| secure key  = Yes
| os guard    = Yes
| intel at    = 
| intel ipt   = 
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon E5-2687W v4 - Intel#io +
base frequency	3,000 MHz (3 GHz, 3,000,000 kHz) +
bus links	2 +
bus rate	9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) +
bus speed	4,800 MHz (4.8 GHz, 4,800,000 kHz) +
bus type	QPI +
chipset	C610 Series +
clock multiplier	30 +
core count	12 +
core family	6 +
core model	4F +
core name	Broadwell EP +
core stepping	M0 +
core voltage	1.82 V (18.2 dV, 182 cV, 1,820 mV) +
cpuid	406F1 +
designer	Intel +
die area	306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) +
family	Xeon E5 +
first announced	June 20, 2016 +
first launched	June 20, 2016 +
full page name	intel/xeon e5/e5-2687w v4 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has extended page tables support	true +
has feature	Trusted Execution Technology +, Transactional Synchronization Extensions +, Intel vPro Technology +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
io voltage	1.2 V (12 dV, 120 cV, 1,200 mV) +
io voltage tolerance	3% +
isa	x86-64 +
isa family	x86 +
l1d$ description	8-way set associative +
l1d$ size	384 KiB (393,216 B, 0.375 MiB) +
l1i$ description	8-way set associative +
l1i$ size	384 KiB (393,216 B, 0.375 MiB) +
l2$ description	8-way set associative +
l2$ size	3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
l3$ description	20-way set associative +
l3$ size	30 MiB (30,720 KiB, 31,457,280 B, 0.0293 GiB) +
ldate	June 20, 2016 +
manufacturer	Intel +
market segment	Server +
max case temperature	349.15 K (76 °C, 168.8 °F, 628.47 °R) +
max cpu count	2 +
max memory	1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) +
max pcie lanes	40 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Broadwell +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	E5-2687W v4 +
name	Xeon E5-2687W v4 +
part number	CM8066002042802 + and BX80660E52687V4 +
platform	Grantley EP 2S +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 2,141.00 (€ 1,926.90, £ 1,734.21, ¥ 221,229.53) +
s-spec	SR2NA +
s-spec (qs)	QK99 +
series	E5-2600 +
smp max ways	2 +
tdp	160 W (160,000 mW, 0.215 hp, 0.16 kW) +
technology	CMOS +
thread count	24 +
transistor count	4,700,000,000 +
turbo frequency (10 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (11 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (12 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (1 core)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (2 cores)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (3 cores)	3,300 MHz (3.3 GHz, 3,300,000 kHz) +
turbo frequency (4 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (5 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (6 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (7 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (8 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
turbo frequency (9 cores)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +