Editing intel/celeron/3955u

{{intel title|Celeron 3955U}}
{{mpu
|name=Celeron 3955U
|no image=Yes
|image=skylake (bga1356).png
|designer=Intel
|manufacturer=Intel
|model number=3955U
|s-spec=SR2EW
|market=Mobile
|first announced=August 15, 2015
|first launched=December 27, 2015
|family=Celeron
|series=3000
|locked=Yes
|frequency=2,000 MHz
|bus type=OPI
|bus rate=4 GT/s
|clock multiplier=20
|isa=x86-64
|isa family=x86
|microarch=Skylake
|core name=Skylake U
|core family=6
|core model=78
|core stepping=D1
|process=14 nm
|transistors=1,750,000,000
|technology=CMOS
|die area=98.57 mm²
|die length=10.3 mm
|die width=9.57 mm
|mcp=Yes
|die count=2
|word size=64 bit
|core count=2
|thread count=2
|max cpus=1
|max memory=32 GiB
|v core min=0.55 V
|v core max=1.52 V
|tdp=15 W
|ctdp down=10 W
|temp max=100 °C
|tjunc min=0 °C
|tjunc max=100 °C
|tstorage min=-25 °C
|tstorage max=125 °C
|package module 1={{packages/intel/fcbga-1356}}
}}
'''Celeron 3955U''' is a {{arch|64}} [[dual-core]] budget [[x86]] mobile microprocessor introduced by [[Intel]] in late [[2015]]. Fabricated on a [[14 nm process]] based on the {{intel|Skylake}} microarchitecture, this processor operates at 2 GHz. The 3955U has a TDP of 15 W with a configurable-down TDP of 10 W. This chip incorporates the {{intel|HD Graphics 510}} GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.

== Cache ==
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=2x32 KiB
|l1i desc=8-way set associative
|l1d cache=64 KiB
|l1d break=2x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=512 KiB
|l2 break=2x256 KiB
|l2 desc=4-way set associative
|l2 policy=write-back
|l3 cache=2 MiB
|l3 break=2x1 MiB
|l3 policy=write-back
}}

== Graphics ==
{{integrated graphic
| gpu                = Intel HD Graphics 510
| displays           = 3
| frequency          = 300 MHz
| max frequency      = 900 MHz
| max memory         = 1700 MiB
| output edp         = Yes
| output dp          = Yes
| output hdmi        = Yes
| output vga         = 
| output dvi         = Yes
| directx ver        = 12
| opengl ver         = 4.4
| max res hdmi       = 4096x2304
| max res hdmi freq  = 24 Hz
| max res dp         = 4096x2304
| max res dp freq    = 60 Hz
| max res edp        = 4096x2304
| max res edp freq   = 60 Hz
| max res vga        = 
| max res vga freq   = 
}}

== Memory controller ==
{{integrated memory controller
| type               = DDR4-1866
| type 1             = DDR4-2133
| type 2             = LPDDR3-1600
| type 3             = LPDDR3-1866
| controllers        = 1
| channels           = 2
| ecc support        = 
| max bandwidth      = 34,100 MB/s
| max memory         = 32,768 MB
}}

== Expansions ==
{{mpu expansions
| pcie revision      = 2.0
| pcie lanes         = 10
| pcie config        = 1x4
| pcie config 1      = 2x2
| pcie config 2      = 1x2+2x1
| pcie config 3      = 4x1
}}

== Features ==
{{mpu features
| em64t     = Yes
| nx        = Yes
| txt       = 
| tsx       = 
| ht        = 
| tbt2      = 
| vt-x      = Yes
| vt-d      = Yes
| mmx       = Yes
| sse       = Yes
| sse2      = Yes
| sse3      = Yes
| ssse3     = Yes
| sse4      = Yes
| sse4.1    = Yes
| sse4.2    = Yes
| aes       = Yes
| avx       = 
| avx2      = 
| bmi       = 
| bmi1      = 
| bmi2      = 
| f16c      = 
| fma3      = 
| sgx       = Yes
| eist      = Yes
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Celeron 3955U - Intel#package + and Celeron 3955U - Intel#io +
base frequency	2,000 MHz (2 GHz, 2,000,000 kHz) +
bus rate	4,000 MT/s (4 GT/s, 4,000,000 kT/s) +
bus type	OPI +
clock multiplier	20 +
core count	2 +
core family	6 +
core model	78 +
core name	Skylake U +
core stepping	D1 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x1906 +
die area	98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die count	2 +
die length	10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width	9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
family	Celeron +
first announced	August 15, 2015 +
first launched	December 27, 2015 +
full page name	intel/celeron/3955u +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, Flex Memory Access +, Smart Response Technology +, My WiFi Technology +, Identity Protection Technology +, Extended Page Tables + and Software Guard Extensions +
has intel enhanced speedstep technology	true +
has intel flex memory access support	true +
has intel identity protection technology support	true +
has intel my wifi technology support	true +
has intel secure key technology	true +
has intel smart response technology support	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 510 +
integrated gpu base frequency	300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	12 +
integrated gpu max frequency	900 MHz (0.9 GHz, 900,000 KHz) +
integrated gpu max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
is multi-chip package	true +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate	December 27, 2015 +
main image	+
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max pcie lanes	12 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	3955U +
name	Celeron 3955U +
package	FCBGA-1356 +
part number	FJ8066201931006 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-spec	SR2EW +
series	3000 +
smp max ways	1 +
supported memory type	DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +
tdp	15 W (15,000 mW, 0.0201 hp, 0.015 kW) +
tdp down	10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
technology	CMOS +
thread count	2 +
transistor count	1,750,000,000 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has software guard extensions	true +