Editing intel/core i3/6120t

{{intel title|Core i3-6120T}}
{{mpu
| name                = Intel Core i3-6120T
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = Intel
| manufacturer        = Intel
| model number        = i3-6120T
| part number         = CM8066201927104
| part number 2       = 
| part number 3       = 
| part number 4       = 
| part number 5       = 
| market              = Desktop
| first announced     = May 9, 2016
| first launched      = June 3, 2016
| last order          = 
| last shipment       = 

| family             = Core i3
| series             = 6100
| locked             = Yes
| frequency          = 
| turbo frequency    = 
| turbo frequency1   = 
| turbo frequency2   = 
| turbo frequency3   = 
| turbo frequency4   = 
| bus type           = DMI 3.0
| bus speed          = 
| bus rate           = 8 GT/s
| clock multiplier   = 
| s-spec             = SR2HF

| isa family          = x86
| isa                 = x86-64
| microarch          = Skylake 
| platform           = 
| core name          = 
| core stepping      = 
| process            = 14 nm
| die size           = 
| word size          = 64 bits
| core count         = 2
| thread count       = 4
| max cpus           = 1
| max memory         = 64 GiB

| electrical          = 
| sdp                 = 
| tdp                 = 
| ctdp down           = 
| ctdp down frequency =
| ctdp up             =
| ctdp up frequency   =
| temp max            = 
| temp min            = 

| packaging           = 
| package             = 
| package type        = 
| package pitch       = 
| package size        = 
| socket              = 
}}
'''Core i3-6120T''' is a {{arch|64}} [[dual-core]] low-end performance [[microprocessor]] set to be introduced by [[Intel]] in 2016.
<br><br><br><br>
{{unknown features}}

== Cache ==
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
{{cache info
|l1i cache=64 KiB
|l1i break=2x32 KiB
|l1i desc=8-way set associative
|l1i extra=(per core, write-back)
|l1d cache=64 KiB
|l1d break=2x32 KiB
|l1d desc=8-way set associative
|l1d extra=(per core, write-back)
|l2 cache=512 KiB
|l2 break=2x256 KiB
|l2 desc=4-way set associative
|l2 extra=(per core, write-back)
|l3 cache=3 MiB
|l3 desc=shared
}}

== Expansions ==
{{mpu expansions
| pcie revision      = 3.0
| pcie lanes         = 16
| pcie config        = 1x16
| pcie config 1      = 2x8
| pcie config 2      = 1x8+2x4
| usb revision       = 
| usb revision 2     = 
| usb ports          = 
| sata ports         = 
| integrated lan     = 
| uart               = 
| gp io              = 
}}

== Features == 
{{mpu features
| em64t       = Yes
| nx          = Yes
| txt         = 
| tsx         = 
| vpro        = 
| ht          = Yes
| tbt1        =
| tbt2        = 
| bpt         = 
| vt-x        = Yes
| vt-d        = Yes
| ept         = Yes
| mmx         = Yes
| sse         = Yes
| sse2        = Yes
| sse3        = Yes
| ssse3       = Yes
| sse4        = Yes
| sse4.1      = Yes
| sse4.2      = Yes
| aes         = Yes
| pclmul      = Yes
| avx         = Yes
| avx2        = Yes
| bmi         = Yes
| bmi1        = Yes
| bmi2        = Yes
| f16c        = Yes
| fma3        = Yes
| mpx         = Yes
| sgx         = Yes
| eist        = Yes
| secure key  = Yes
| os guard    = Yes
| intel at    = 
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i3-6120T - Intel#package + and Core i3-6120T - Intel#io +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Sunrise Point +
core count	2 +
core family	6 +
core model	94 +
core name	Skylake S +
core stepping	S0 +
core voltage (max)	1.52 V (15.2 dV, 152 cV, 1,520 mV) +
core voltage (min)	0.55 V (5.5 dV, 55 cV, 550 mV) +
designer	Intel +
device id	0x1912 +
die area	98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) +
die length	10.3 mm (1.03 cm, 0.406 in, 10,300 µm) +
die width	9.57 mm (0.957 cm, 0.377 in, 9,570 µm) +
family	Core i3 +
first announced	May 9, 2016 +
full page name	intel/core i3/6120t +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Hyper-Threading Technology +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Secure Key Technology +, OS Guard +, Identity Protection Technology +, Extended Page Tables +, Memory Protection Extensions + and Software Guard Extensions +
has intel enhanced speedstep technology	true +
has intel identity protection technology support	true +
has intel secure key technology	true +
has intel supervisor mode execution protection	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics 530 +
integrated gpu base frequency	350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designer	Intel +
integrated gpu execution units	24 +
integrated gpu max frequency	950 MHz (0.95 GHz, 950,000 KHz) +
integrated gpu max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isa	x86-64 +
isa family	x86 +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	8-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	4-way set associative +
l2$ size	0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size	3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
ldate	May 9, 2016 +
main image	+
manufacturer	Intel +
market segment	Desktop +
max cpu count	1 +
max junction temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory	65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth	31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max pcie lanes	16 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i3-6120T +
name	Core i3-6120T +
package	FCLGA-1151 +
part number	CM8066201927104 +
process	14 nm (0.014 μm, 1.4e-5 mm) +
s-spec	SR2HF +
series	i3-6000 +
smp max ways	1 +
socket	LGA-1151 +
supported memory type	DDR3L-1600 + and DDR4-2133 +
tdp	35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technology	CMOS +
thread count	4 +
word size	64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensions	true +
x86/has software guard extensions	true +