Editing amd/athlon mp/amsn2600dkt3c

{{amd title|Athlon MP 2600+}}
{{mpu
| name                = AMD Athlon MP 2600+
| no image            = yes
| image               = 
| image size          = 
| caption             = 
| designer            = AMD
| manufacturer        = AMD
| model number        = Athlon MP 2600+
| part number         = AMSN2600DKT3C
| market              = Server
| first announced     = February 4, 2003
| first launched      = February 4, 2003
| last order          = 
| last shipment       = 
| release price       = $273

| family              = Athlon MP
| series              = 
| locked              = Yes
| frequency           = 2,133 MHz
| bus type            = FSB
| bus speed           = 133 MHz
| bus rate            = 266 MT/s
| clock multiplier    = 16
| cpuid               = 680
| cpuid 2             = 681

| microarch           = K7
| platform            = Athlon MP
| chipset             = AMD-760MP
| core name           = Thoroughbred
| core family         = 6
| core model          = 8
| core stepping       = 0
| core stepping 2     = 1
| process             = 130 nm
| transistors         = 37,200,000
| technology          = CMOS
| die area            = 85 mm²
| die width           = 
| die length          = 
| word size           = 32 bit
| core count          = 1
| thread count        = 1
| max cpus            = 2
| max memory          = 4 GiB

| electrical          = Yes
| v core              = 1.65 V
| v core tolerance    = 
| v io                = 
| v io tolerance      = 
| sdp                 = 
| tdp                 = 60 W
| tdp typical         = 56.6 W
| tjunc min           = 0 °C
| tjunc max           = 90 °C
| tcase min           = 0 °C
| tcase max           = 90 °C
| tstorage min        = -40 °C
| tstorage max        = 100 °C

|package module 1={{packages/amd/pga-453}}
}}
The '''Athlon MP 2600+''' (OPN ''AMSN2600DKT3C'') based on the {{amd|Thoroughbred|l=core}} core was a {{arch|32}} [[x86]] [[multiprocessor]] developed by [[AMD]] and introduced in late [[2002]] for the server and workstation market. This MPU operated at 2.1 GHz with a FSB transfer rate of 266 MT/s (x16 multiplier), was manufactured on a newer [[130 nm]] copper processor technology in Fab 30 in Dresden, Germany.

== Cache ==
{{main|amd/microarchitectures/k7#Memory_Hierarchy|l1=K7 § Cache}}
{{cache size
|l1 cache=128 KiB
|l1i cache=64 KiB
|l1i break=1x64 KiB
|l1i desc=2-way set associative
|l1i policy=
|l1d cache=64 KiB
|l1d break=1x64 KiB
|l1d desc=2-way set associative
|l1d policy=
|l2 cache=256 KiB
|l2 break=1x256 KiB
|l2 desc=16-way set associative
|l2 policy=
}}

== Graphics ==
This MPU has no integrated graphics processing unit.

== Features == 
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=No
|nx=No
|3dnow=Yes
|e3dnow=Yes
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=No
|sse3=No
|ssse3=No
|sse41=No
|sse42=No
|sse4a=No
|avx=No
|avx2=No
|avx512=No
|abm=No
|tbm=No
|bmi1=No
|bmi2=No
|fma3=No
|fma4=No
|aes=No
|rdrand=No
|sha=No
|xop=No
|adx=No
|clmul=No
|f16c=No
|tbt1=No
|tbt2=No
|tbmt3=No
|bpt=No
|eist=No
|flex=No
|isrt=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=No
|txt=No
|ht=No
|vpro=No
|vtx=No
|vtd=No
|ept=No
|mpx=No
|sgx=No
|securekey=No
|osguard=No
|smartmp=Yes
|powernow=No
|amdv=No
|rvi=No
}}
* Advanced Configuration and Power Interface [[has feature::ACPI| ]]
** [[has feature::Halt State]]
** [[has feature::Stop Grant State]]

== Documents ==
=== Datasheets ===
* [[:File:AMD Athlon MP Processor Model 8 Data Sheet for Multiprocessor Platforms.pdf|AMD Athlon MP Processor Model 8 Data Sheet for Multiprocessor Platforms]]; Publication # 25722 Rev. E; Issue Date: March 2003.
=== Others ===
* [[:File:System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors.pdf|System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors]]; Publication # 25325; Rev: B; August 2002.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Athlon MP 2600+ - AMD#package +
base frequency	2,133 MHz (2.133 GHz, 2,133,000 kHz) +
bus rate	266 MT/s (0.266 GT/s, 266,000 kT/s) +
bus speed	133 MHz (0.133 GHz, 133,000 kHz) +
bus type	FSB +
chipset	AMD-760MP +
clock multiplier	16 +
core count	1 +
core family	6 +
core model	8 +
core name	Thoroughbred +
core stepping	0 + and 1 +
core voltage	1.65 V (16.5 dV, 165 cV, 1,650 mV) +
cpuid	680 + and 681 +
designer	AMD +
die area	85 mm² (0.132 in², 0.85 cm², 85,000,000 µm²) +
family	Athlon MP +
first announced	February 4, 2003 +
first launched	February 4, 2003 +
full page name	amd/athlon mp/amsn2600dkt3c +
has amd smartmp technology	true +
has feature	SmartMP Technology +, ACPI +, Halt State + and Stop Grant State +
has locked clock multiplier	true +
has multiprocessing support	true +
instance of	microprocessor +
l1$ size	128 KiB (131,072 B, 0.125 MiB) +
l1d$ description	2-way set associative +
l1d$ size	64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description	2-way set associative +
l1i$ size	64 KiB (65,536 B, 0.0625 MiB) +
l2$ description	16-way set associative +
l2$ size	0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldate	February 4, 2003 +
manufacturer	AMD +
market segment	Server +
max case temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max cpu count	2 +
max junction temperature	363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory	4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max storage temperature	373.15 K (100 °C, 212 °F, 671.67 °R) +
microarchitecture	K7 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min junction temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Athlon MP 2600+ +
name	AMD Athlon MP 2600+ +
package	OPGA-453 +
part number	AMSN2600DKT3C +
platform	Athlon MP +
process	130 nm (0.13 μm, 1.3e-4 mm) +
release price	$ 273.00 (€ 245.70, £ 221.13, ¥ 28,209.09) +
smp max ways	2 +
tdp	60 W (60,000 mW, 0.0805 hp, 0.06 kW) +
tdp (typical)	56.6 W (56,600 mW, 0.0759 hp, 0.0566 kW) +
technology	CMOS +
thread count	1 +
transistor count	37,200,000 +
word size	32 bit (4 octets, 8 nibbles) +