Editing intel/xeon gold/6154

{{intel title|Xeon Gold 6154}}
{{mpu
| future              = Yes
| name                = Xeon Gold 6154
| no image            = Yes
| image               = 
| image size          = 
| caption             = 
| designer            = Intel
| manufacturer        = Intel
| model number        = 6154
| part number         = CD8067303592700
| part number 1       = 
| part number 2       = 
| s-spec              = SR3J5
| s-spec 2            = 
| market              = Server
| first announced     = April 25, 2017
| first launched      = 
| last order          = 
| last shipment       = 
| release price       = 

| family              = Xeon Gold
| series              = 6100
| locked              = Yes
| frequency           = 3.0 GHz
| turbo frequency     = 
| turbo frequency1    = 
| turbo frequency2    = 
| turbo frequency3    = 
| turbo frequency4    = 
| turbo frequency5    = 
| turbo frequency6    = 
| turbo frequency7    = 
| turbo frequency8    = 
| bus type            = DMI 3.0
| bus speed           = 
| bus rate            = 8 GT/s
| bus links           = 4
| clock multiplier    = 30
| cpuid               = 
| cpuid 2             = 

| isa family          = x86-64
| isa                 = x86
| microarch           = Skylake
| platform            = Purley
| chipset             = Lewisburg
| core name           = Skylake SP
| core family         = 
| core model          = 
| core stepping       = H0
| process             = 14 nm
| transistors         = 
| technology          = CMOS
| die area            = <!-- XX mm² -->
| die width           = 
| die length          = 
| word size           = 64 bit
| core count          = 18
| thread count        = 36
| max cpus            = 2
| max memory          = 

| electrical          = 
| power               = 
| average power       = 
| idle power          = 
| v core              = 
| v core tolerance    = <!-- OR ... -->
| v core min          = 
| v core max          = 
| v io                = 
| v io tolerance      = 
| v io 2              = <!-- OR ... -->
| v io 3              = 
| sdp                 = 
| tdp                 = 
| tdp typical         = 
| ctdp down           = 
| ctdp down frequency = 
| ctdp up             = 
| ctdp up frequency   = 
| temp min            = <!-- use TJ/TC whenever possible instead -->
| temp max            = 
| tjunc min           = <!-- .. °C -->
| tjunc max           = 
| tcase min           = 
| tcase max           = 
| tstorage min        = 
| tstorage max        = 
| tambient min        = 
| tambient max        = 

| package module 1    = 
| package module 2    = 
<!-------- USE ONLY IF MUST, OTHERWISE TRY TO USE MODULE ABOVE -------------->
| packaging           = Yes
| package 0           = FCLGA-3647
| package 0 type      = LGA
| package 0 pins      = 3647
| package 0 pitch     = 
| package 0 width     = 
| package 0 length    = 
| package 0 height    = 
| socket 0            = LGA-3647
| socket 0 type       = LGA
}}
'''Xeon Gold 6154''' is a {{arch|64}} [[x86]] high-performance server [[octadeca-core]] [[multiprocessor]] set to be introduced by [[Intel]] in the second quarter of 2017. This processor is based on the server configuration of the {{intel|Skylake|l=arch}} microarchitecture (a {{intel|Skylake SP|l=core}} core) and is manufactured on Intel's [[14 nm process]]. The 6154 operates at 3.0 GHz.


{{unknown features}}

== Cache ==
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
{{cache size
|l1 cache=1.125 MiB
|l1i cache=576 KiB
|l1i break=18x32 KiB
|l1i desc=8-way set associative
|l1d cache=576 KiB
|l1d break=18x32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=18 MiB
|l2 break=18x1 MiB
|l2 desc=16-way set associative
|l2 policy=write-back
|l3 cache=24.75 MiB
|l3 break=18x1.375 MiB
|l3 desc=11-way set associative
|l3 policy=write-back
}}

== Memory controller ==
{{memory controller
|type=DDR4-2666
|ecc=Yes
|max mem=
|controllers=1
|channels=6
|max bandwidth=119.21 GiB/s
|bandwidth schan=19.89 GiB/s
|bandwidth dchan=39.72 GiB/s
|bandwidth qchan=79.47 GiB/s
|bandwidth hchan=119.21 GiB/s
}}
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel +, Xeon Gold 6154 - Intel + and Xeon Gold 6154 - Intel#io +
base frequency	3,000 MHz (3 GHz, 3,000,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Lewisburg +
clock multiplier	30 +
core count	18 +
core family	6 +
core name	Skylake SP +
core stepping	H0 +
cpuid	0x50654 +
designer	Intel +
family	Xeon Gold +
first announced	April 25, 2017 +
first launched	July 11, 2017 +
full page name	intel/xeon gold/6154 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Transactional Synchronization Extensions +, Turbo Boost Technology 2.0 +, Speed Shift Technology +, Trusted Execution Technology +, Extended Page Tables + and Advanced Vector Extensions 512 +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	1,152 KiB (1,179,648 B, 1.125 MiB) +
l1d$ description	8-way set associative +
l1d$ size	576 KiB (589,824 B, 0.563 MiB) +
l1i$ description	8-way set associative +
l1i$ size	576 KiB (589,824 B, 0.563 MiB) +
l2$ description	16-way set associative +
l2$ size	18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) +
l3$ description	11-way set associative +
l3$ size	24.75 MiB (25,344 KiB, 25,952,256 B, 0.0242 GiB) +
ldate	July 11, 2017 +
main image	+
manufacturer	Intel +
market segment	Server +
max case temperature	355.15 K (82 °C, 179.6 °F, 639.27 °R) +
max cpu count	4 +
max dts temperature	106 °C +
max memory	786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) +
max memory bandwidth	119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels	6 +
max pcie lanes	48 +
microarchitecture	Skylake (server) +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min dts temperature	0 °C +
model number	6154 +
name	Xeon Gold 6154 +
package	FCLGA-3647 +
part number	CD8067303592700 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 3,543.00 (€ 3,188.70, £ 2,869.83, ¥ 366,098.19) +
s-spec	SR3J5 +
s-spec (qs)	QMQ9 +
series	6100 +
smp interconnect	UPI +
smp interconnect links	3 +
smp interconnect rate	10.4 GT/s +
smp max ways	4 +
socket	Socket P + and LGA-3647 +
supported memory type	DDR4-2666 +
tdp	200 W (200,000 mW, 0.268 hp, 0.2 kW) +
technology	CMOS +
thread count	36 +
turbo frequency (1 core)	3,700 MHz (3.7 GHz, 3,700,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +