Editing intel/cores/kaby lake dt

{{intel title|Kaby Lake DT|core}}
{{core
| name              = Kaby Lake DT
| image             = kaby lake dt (front).png
| image size        = 250px
| image 2           = kaby lake dt (back).png
| image 2 size      = 250px
| developer         = Intel
| manufacturer      = Intel
| first announced   = March 28, 2017
| first launched    = March 28, 2017
| isa               = x86-64
| microarch         = Kaby Lake
| word              = 64 bit
| proc              = 14 nm
| tech              = CMOS
| clock min         = 3,000 MHz
| clock max         = 3,900 MHz
| package           = FCLGA-1151
| socket            = LGA-1151

| succession       = Yes
| predecessor      = Skylake DT
| predecessor link = intel/cores/skylake dt
| successor        = Cannonlake DT
| successor link   = intel/cores/cannonlake dt
}}
'''Kaby Lake DT''' ('''KBL-DT''') is the name of the core for [[Intel]]'s workstations and entry-level servers line of processors based on the {{intel|Kaby Lake|l=arch}} microarchitecture serving as a successor to {{intel|Skylake DT|l=core}} core. These chips are primarily targeted towards professional-grade workstation and entry-level servers. Kaby Lake DT processors are fabricated on Intel's enhanced [[14 nm lithography process|14nm+ process]] and provide {{intel|kaby_lake#Key_changes_from_Skylake|slight enhancements over|l=arch}} comparable Skylake models.

== Overview ==
Kaby Lake DT based processors are a 2-chip solution - the [[microprocessor]] and the [[chipset]]. Kaby Lake DT are {{intel|LGA-1151|Socket LGA-1151}} and use {{intel|Union Point}} chipset ({{intel|Platform Controller Hub|HUB}}) but they may also use previous generation ({{intel|Skylake DT|l=core}}) {{intel|Sunrise Point}}. The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (DMI 3.0), allowing for 8 GT/s transfer rate per lane.

=== Common Features ===
All Kaby Lake DT processors have the following:

* Dual-channel Memory
** Up to DDR3L-1866, DDR4-2400
** Up to 64 GiB
** Has ECC support
* 16x PCIe (4 of the 20 are used by the bus as described above)
* [[quad-core]] with 4 to 8 threads (not all DT models support {{intel|Hyper-Threading}})
* Everything up to AVX2 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, and AVX2)
* Has support for {{intel|Turbo Boost|Turbo Boost 2.0}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|VT-d}}/{{intel|EPT}}, {{intel|TSX}}, {{intel|SpeedStep}}, {{intel|Identity Protection}}, {{intel|Secure Key}}, Software Guard ({{intel|SGX}}), Memory Protection ({{intel|MPX}}), {{intel|OS Guard}}, {{intel|TXT}}
* Graphics
** {{intel|HD Graphics P630}} ({{intel|Gen9.5|l=arch}} GT2)
** Base frequency of 350 MHz
** Burst frequency of 1.15 GHz
{{clear}}

== Kaby Lake DT Processors ==
<!-- NOTE: 
           This table is generated automatically from the data in the actual articles.
           If a microprocessor is missing from the list, an appropriate article for it needs to be
           created and tagged accordingly.

           Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
-->
{{comp table start}}
<table class="comptable sortable tc15 tc16 tc17 tc18 tc19">
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Kaby Lake DT Processors</th></tr>
<tr class="comptable-header"><th>&nbsp;</th><th colspan="10">Main processor</th><th colspan="3">IGP</th><th colspan="7">Major Feature Diff</th></tr>
<tr class="comptable-header"><th class="unsortable">Model</th><th>Launched</th><th data-sort-type="currency">Price</th><th>Family</th><th data-sort-type="number">C</th><th data-sort-type="number">T</th><th data-sort-type="number">L3$</th><th data-sort-type="number">TDP</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th data-sort-type="number">Max Mem</th><th>Name</th><th data-sort-type="number">Freq</th><th data-sort-type="number">Turbo</th><th>{{intel|Hyper-Threading|HT}}</th></tr>
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake DT]]
 |?full page name
 |?model number
 |?first launched
 |?release price
 |?microprocessor family
 |?core count
 |?thread count
 |?l3$ size
 |?tdp
 |?base frequency#GHz
 |?turbo frequency (1 core)#GHz
 |?max memory#GiB
 |?integrated gpu
 |?integrated gpu base frequency
 |?integrated gpu max frequency
 |?has simultaneous multithreading
 |format=template
 |template=proc table 3
 |searchlabel=
 |sort=microprocessor family, model number
 |order=asc,asc
 |userparam=16:16
 |mainlabel=-
 |limit=100
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[core name::Kaby Lake DT]]}}
</table>
{{comp table end}}

== See also ==
{{intel kaby lake core see also}}
* {{intel|Skylake|l=arch}}
** {{intel|Skylake DT|l=core}}
designer	Intel +
first announced	March 28, 2017 +
first launched	March 28, 2017 +
instance of	core +
isa	x86-64 +
main image	+ and +
manufacturer	Intel +
microarchitecture	Kaby Lake +
name	Kaby Lake DT +
platform	Greenlow +
process	14 nm (0.014 μm, 1.4e-5 mm) +
technology	CMOS +
word size	64 bit (8 octets, 16 nibbles) +