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  • intel/microarchitectures/skylake (client)
    |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
    79 KB (11,922 words) - 06:46, 11 November 2022
  • amd/microarchitectures/zen 3
    |isa=x86-64 * {{x86|VAES}} - 256-bit Vector AES instructions
    15 KB (1,978 words) - 22:13, 6 April 2023
  • amd/cores/milan
    |isa=x86-64 * 8 to 64 {{amd|Zen 3|l=arch}} [[x86]] CPU cores with 2-way [[SMT]]
    19 KB (2,734 words) - 01:26, 31 May 2021
  • intel/microarchitectures/skylake (server)
    |isa=x86-64 ! Cores !! {{intel|Hyper-Threading|HT}} !! {{x86|AVX}} !! {{x86|AVX2}} !! {{x86|AVX-512}} !! {{intel|Turbo Boost|TBT}} !! [[ECC]]
    52 KB (7,651 words) - 00:59, 6 July 2022
  • amd/cores/genoa
    |isa=x86-64 * 16 to 96 {{amd|Zen 4|l=arch}} [[x86]] CPU cores with 2-way [[SMT]]
    14 KB (1,983 words) - 01:41, 2 April 2023
  • amd/cores/chagall
    |isa=x86-64 ...aging to OEMs. They identify as members of {{amd|CPUID#Family 25 (19h)|AMD x86 CPU Family 19h, Model 08h}}.
    8 KB (1,180 words) - 14:26, 17 March 2023
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