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  • {{intel title|Bonnell|arch}} |designer=Intel
    38 KB (5,468 words) - 20:29, 23 May 2019
  • {{intel title|Celeron}} | title = Intel Celeron
    25 KB (3,201 words) - 03:13, 22 September 2018
  • {{intel title|Sandy Bridge (client)|arch}} |designer=Intel
    84 KB (13,075 words) - 00:54, 29 December 2020
  • {{intel title|Mobile Pentium II}} | developer = Intel
    5 KB (635 words) - 09:54, 11 November 2017
  • ...itor to Intel (performance {{\\|K5}} failed to deliver). K6 was superseded by {{\\|K6-2}} in 1998. *** Complex instructions handled by microcode
    4 KB (578 words) - 18:57, 22 May 2019
  • ...er speed backwards compatible variant of [[Socket 7]]. K6-2 was superseded by {{\\|K6-III}} in 1999. K6-2 microarchitecture-based chips were manufactured on AMD's [[0.25 μm process]], a five-layer-metal process technology using loc
    2 KB (309 words) - 20:01, 30 November 2017
  • ...successor to {{\\|Socket FM2+}} and {{\\|Socket AM3+}}. It was superseded by {{\\|Socket AM5}}. ...3|l=arch}} microarchitectures, although the exact chips supported depends on the accompanying chipset.
    30 KB (6,098 words) - 01:58, 12 January 2024
  • | type = Microprocessor, System on a Chip ...oprocessors implementing the [[MIPS32]] ISA. They were originally designed by [[Alchemy Semiconductor]] and target communication and media devices, e.g.
    31 KB (4,972 words) - 03:09, 20 March 2022