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- ...-in-space effort.<ref name="manual" /> The computer, which facilitated the control of mission maneuvers, was designed by the [[IBM Federal Systems Division]]. ...for the following functions:<ref name="ibm" /><ref name="manual">McDonnell Corporation, NASA Project Gemini Familiarization Manual, 1965, vol. 2, pp. 8.7,8.45.</r4 KB (592 words) - 14:40, 23 November 2015
- A key advantage of a MOSFET is that it requires almost no input current to control the load current, when compared with [[bipolar junction transistors]] (BJTs |assign=[[RCA Corporation]]|inventor1-last=Medwin |inventor1-first=Albert H.|inventorlink1=Albert_Med193 KB (26,874 words) - 17:01, 6 September 2024
- | {{\\|100220}} || Address and Data Interface Unit (ADIU) * 1981: [[Control Data Corporation]] {{cdc|Cyber 205}} used 100K series chips for its [[microcode]] memory log4 KB (521 words) - 13:38, 11 June 2017
- ...circuit]]s such as [[image sensor]]s ([[CMOS sensor]]s), [[data conversion|data converters]], [[RF circuit]]s ([[RF CMOS]]), and highly integrated [[transc ...technology to develop a [[large-scale integration]] (LSI) chip for [[Sharp Corporation|Sharp]]'s Elsi Mini [[LED]] [[pocket calculator]], developed in 1971 and re39 KB (5,310 words) - 17:19, 6 September 2024
- | developer = Digital Equipment Corporation ...8}} multi-chip [[microprocessor]] developed jointly by [[Digital Equipment Corporation]] and [[Western Digital]]. The LSI-11 was DEC's first large-scale integrati2 KB (253 words) - 23:33, 18 May 2016
- | developer = Digital Equipment Corporation ...]] developed by [[Western Digital]] as a derivative of [[digital equipment corporation|DEC]]'s {{decc|LSI-11}}.1 KB (148 words) - 00:04, 19 May 2016
- | developer 2 = Datapoint Corporation | data size = 8 bit13 KB (2,079 words) - 20:48, 17 September 2024
- ** L1 Data Cache *** Tag + data = 4.5 KiB + 17.5 KiB38 KB (5,468 words) - 19:29, 23 May 2019
- ...A family to [[Marvell]] while [[Raza Microelectronics]], later renamed RMI Corporation, secured the Alchemy line and some of its designers from AMD. On January 9, ...internal System Bus (SBUS) which carries a 36-bit physical address, 32-bit data, and a byte mask, running at a configurable ratio of 1/2, 1/3, or 1/4 of th31 KB (4,972 words) - 02:09, 20 March 2022