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  • intel/microarchitectures/sandy bridge (client)
    ...entirely redesigned to incorporate a new decoded pipeline using a new µOP cache. The back-end is an entirely new PRF-based renaming architecture with a con * New last level cache architecture
    84 KB (13,075 words) - 00:54, 29 December 2020
  • samsung/microarchitectures/m1
    * Cache ** L1I Cache
    13 KB (1,962 words) - 14:48, 21 February 2019
  • samsung/microarchitectures/m3
    *** Larger [[L1 data cache]] (64 KiB, up from 32 KiB) *** New L2 Cache
    20 KB (3,149 words) - 10:44, 15 February 2020
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