• population count
  ! Language !! Compiler !! Function | [[ARM]] || [[NEON]] || VCNT ||
  3 KB (447 words) - 01:55, 14 March 2023
• intel/microarchitectures/bonnell
  == Compiler support == ! Compiler !! Arch-Specific || Arch-Favorable
  38 KB (5,468 words) - 20:29, 23 May 2019
• x86/extensions
  ...|| Trailing Bit Manipulation; bit manipulation instructions designed to be compiler intrinsics * {{arm|Versions|ARM's Versions}}
  6 KB (764 words) - 08:53, 7 June 2020
• arm holdings/microarchitectures/cortex-a53
  |designer=ARM Holdings ...to the {{armh|Cortex-A7|l=arch}}. The Cortex-A53, which implemented the {{arm|ARMv8}} ISA, is typically found in entry-level smartphone and other embedde
  6 KB (758 words) - 13:01, 6 March 2022
• qualcomm/microarchitectures/falkor
  '''Falkor''' is an [[ARM]] microarchitecture designed by [[Qualcomm]] for the server market. Falkor- == Compiler Support ==
  6 KB (822 words) - 13:01, 19 May 2021
• arm holdings/microarchitectures/cortex-a75
  |designer=ARM Holdings ...be implemented in their own chips. The Cortex-A75, which implemented the {{arm|ARMv8.2}} ISA, is the a performant core which is often combined with a numb
  2 KB (277 words) - 23:03, 23 March 2020
• cve/cve-2017-5753
  ...ructed piece of [[JavaScript]] can running on a browser that has a [[JIT]] compiler can be used to leak the entire memory of its parent process (i.e. the brows ...gs|ARM]] || {{armh|Cortex-R7|l=arch}} || rowspan="10" | [https://developer.arm.com/support/security-update Post]
  12 KB (1,869 words) - 10:01, 27 February 2019
• samsung/microarchitectures/m1
  .... This was Samsung's first in-house developed high-performance low-power [[ARM]] microarchitecture. == Compiler support ==
  13 KB (1,962 words) - 14:48, 21 February 2019
• samsung/microarchitectures/m2
  ...e 2''' ('''M2''') is the successor to the {{\\|Mongoose 1}}, a [[10 nm]] [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. == Compiler support ==
  3 KB (456 words) - 14:50, 21 February 2019
• samsung/microarchitectures/m3
  ...' ('''Meerkat''') is the successor to the {{\\|Mongoose 2}}, a [[10 nm]] [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. == Compiler support ==
  20 KB (3,149 words) - 10:44, 15 February 2020
• cavium/microarchitectures/vulcan
  '''Vulcan''' is a [[16 nm]] high-performance {{arch|64}} [[ARM]] microarchitecture designed by [[Broadcom]] and later introduced by [[Cavi ...outcome of this effort which involved adapting the existing core to the [[ARM]] ISA instead of [[MIPS]] and enhancing the cores in various ways. Vulcan d
  17 KB (2,449 words) - 22:11, 4 October 2019
• samsung/microarchitectures/m4
  ...nos M4''' ('''Cheetah''') is the successor to the {{\\|M3}}, an [[8 nm]] [[ARM]] microarchitecture designed by [[Samsung]] for their consumer electronics. == Compiler support ==
  5 KB (680 words) - 14:43, 16 March 2023
• arm holdings/microarchitectures/neoverse n1
  |designer=ARM Holdings ...Ares''') is a high-performance [[ARM]] [[microarchitecture]] designed by [[ARM Holdings]] for the server market. This microarchitecture is designed as a s
  7 KB (980 words) - 13:46, 18 February 2023
• arm holdings/microarchitectures/cortex-a76
  |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a75
  14 KB (2,183 words) - 17:15, 17 October 2020
• arm holdings/microarchitectures/cortex-a77
  |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a76
  17 KB (2,555 words) - 06:08, 16 June 2023
• arm holdings/microarchitectures/cortex-a78
  |designer=ARM Holdings |predecessor link=arm holdings/microarchitectures/cortex-a77
  21 KB (3,067 words) - 09:25, 31 March 2022
• ampere computing/emag
  '''eMAG''' is a family of {{arch|64}} high-performance [[ARM]] server microprocessors designed by [[Ampere Computing]] for the data cent eMAG is a family of high-performance [[ARM]] server processors designed by [[Ampere Computing]] and introduced in [[20
  4 KB (518 words) - 12:59, 19 May 2021
• cavium/thunderx
  '''ThunderX''' is a family of {{arch|64}} [[multi-core]] [[ARM]] server microprocessors introduced by [[Cavium]]. == Compiler Support ==
  4 KB (452 words) - 13:02, 19 May 2021
• arm holdings/microarchitectures/cortex-a73
  |designer=ARM Holdings ...be implemented in their own chips. The Cortex-A73, which implemented the {{arm|ARMv8}} ISA, is the performance core which is often combined with a number
  2 KB (205 words) - 23:49, 4 April 2021
• arm holdings/microarchitectures/cortex-a72
  |designer=ARM Holdings ...be implemented in their own chips. The Cortex-A72, which implemented the {{arm|ARMv8}} ISA, is a performant core which is often combined with a number of
  2 KB (291 words) - 15:57, 4 July 2022

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