From WikiChip
Editing technology node
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.
Latest revision | Your text | ||
Line 2: | Line 2: | ||
The '''technology node''' (also '''process node''', '''process technology''' or simply '''node''') refers to a specific [[semiconductor manufacturing process]] and its design rules. Different nodes often imply different circuit generations and architectures. Generally, the smaller the technology node means the smaller the feature size, producing smaller transistors which are both faster and more power-efficient. Historically, the process node name referred to a number of different features of a transistor including the [[gate length]] as well as M1 half-pitch. Most recently, due to various marketing and discrepancies among foundries, the number itself has lost the exact meaning it once held. Recent technology nodes such as [[22 nm]], [[16 nm]], [[14 nm]], and [[10 nm]] refer purely to a specific generation of chips made in a particular technology. It does not correspond to any gate length or half pitch. Nevertheless, the name convention has stuck and it's what the leading foundries call their nodes. | The '''technology node''' (also '''process node''', '''process technology''' or simply '''node''') refers to a specific [[semiconductor manufacturing process]] and its design rules. Different nodes often imply different circuit generations and architectures. Generally, the smaller the technology node means the smaller the feature size, producing smaller transistors which are both faster and more power-efficient. Historically, the process node name referred to a number of different features of a transistor including the [[gate length]] as well as M1 half-pitch. Most recently, due to various marketing and discrepancies among foundries, the number itself has lost the exact meaning it once held. Recent technology nodes such as [[22 nm]], [[16 nm]], [[14 nm]], and [[10 nm]] refer purely to a specific generation of chips made in a particular technology. It does not correspond to any gate length or half pitch. Nevertheless, the name convention has stuck and it's what the leading foundries call their nodes. | ||
− | Since around 2017 node names have been entirely overtaken by marketing with some leading-edge foundries using node names ambiguously to represent slightly modified processes. Additionally, the size, density, and performance of the transistors among foundries no longer matches between foundries. For example, Intel's [[10 nm]] is | + | Since around 2017 node names have been entirely overtaken by marketing with some leading-edge foundries using node names ambiguously to represent slightly modified processes. Additionally, the size, density, and performance of the transistors among foundries no longer matches between foundries. For example, Intel's [[10 nm]] is comperable to foundries [[7 nm]] while Intel's [[7 nm]] is comparable to foundries [[3 nm]]. |
== Nomenclature == | == Nomenclature == | ||
Line 27: | Line 27: | ||
== Leading edge trend == | == Leading edge trend == | ||
− | As shrinking becomes more complex, requiring more capital, expertise, and resources, the number of companies capable of providing leading edge fabrication has been steadily dropping. As of | + | As shrinking becomes more complex, requiring more capital, expertise, and resources, the number of companies capable of providing leading edge fabrication has been steadily dropping. As of 2018, only three companies are now capable of fabricating [[integrated circuits]] on the most cutting edge process: [[Intel]], [[Samsung]], and [[TSMC]]. |
{| class="wikitable" style="text-align: center;" | {| class="wikitable" style="text-align: center;" | ||
− | ! colspan="11" | Number of | + | ! colspan="11" | Number of Foundries with a Cutting Edge Logic Fab |
|- style="vertical-align: bottom; font-size: .8em;" | |- style="vertical-align: bottom; font-size: .8em;" | ||
| | | | ||
Line 45: | Line 45: | ||
[[Hitachi]]<br> | [[Hitachi]]<br> | ||
[[Cypress]]<br> | [[Cypress]]<br> | ||
− | |||
[[Sony]]<br> | [[Sony]]<br> | ||
[[Infineon]]<br> | [[Infineon]]<br> | ||
Line 51: | Line 50: | ||
[[Freescale]]<br> | [[Freescale]]<br> | ||
[[Renesas]] (NEC)<br> | [[Renesas]] (NEC)<br> | ||
+ | [[SMIC]]<br> | ||
[[Toshiba]]<br> | [[Toshiba]]<br> | ||
[[Fujitsu]]<br> | [[Fujitsu]]<br> | ||
Line 56: | Line 56: | ||
[[Panasonic]]<br> | [[Panasonic]]<br> | ||
[[STMicroelectronics]]<br> | [[STMicroelectronics]]<br> | ||
− | [[ | + | [[UMC]]<br> |
[[IBM]]<br> | [[IBM]]<br> | ||
− | |||
− | |||
[[AMD]]<br> | [[AMD]]<br> | ||
[[Samsung]]<br> | [[Samsung]]<br> | ||
Line 73: | Line 71: | ||
Hitachi<br> | Hitachi<br> | ||
Cypress<br> | Cypress<br> | ||
− | |||
Sony<br> | Sony<br> | ||
Infineon<br> | Infineon<br> | ||
Line 79: | Line 76: | ||
Freescale<br> | Freescale<br> | ||
Renesas<br> | Renesas<br> | ||
+ | SMIC<br> | ||
Toshiba<br> | Toshiba<br> | ||
Fujitsu<br> | Fujitsu<br> | ||
Line 84: | Line 82: | ||
Panasonic<br> | Panasonic<br> | ||
STM<br> | STM<br> | ||
− | + | UMC<br> | |
IBM<br> | IBM<br> | ||
− | |||
− | |||
AMD<br> | AMD<br> | ||
Samsung<br> | Samsung<br> | ||
Line 93: | Line 89: | ||
Intel | Intel | ||
| | | | ||
− | |||
Cypress<br> | Cypress<br> | ||
− | |||
Sony<br> | Sony<br> | ||
Infineon<br> | Infineon<br> | ||
Line 101: | Line 95: | ||
Freescale<br> | Freescale<br> | ||
Renesas<br> | Renesas<br> | ||
+ | SMIC<br> | ||
Toshiba<br> | Toshiba<br> | ||
Fujitsu<br> | Fujitsu<br> | ||
Line 106: | Line 101: | ||
Panasonic<br> | Panasonic<br> | ||
STM<br> | STM<br> | ||
− | <br> | + | UMC<br> |
IBM<br> | IBM<br> | ||
− | |||
− | |||
AMD<br> | AMD<br> | ||
Samsung<br> | Samsung<br> | ||
Line 116: | Line 109: | ||
| | | | ||
Renesas<br> | Renesas<br> | ||
+ | SMIC<br> | ||
Toshiba<br> | Toshiba<br> | ||
Fujitsu<br> | Fujitsu<br> | ||
Line 121: | Line 115: | ||
Panasonic<br> | Panasonic<br> | ||
STM<br> | STM<br> | ||
− | + | UMC<br> | |
IBM<br> | IBM<br> | ||
− | |||
− | |||
[[GlobalFoundries]]<br> | [[GlobalFoundries]]<br> | ||
Samsung<br> | Samsung<br> | ||
Line 131: | Line 123: | ||
| | | | ||
Renesas<br> | Renesas<br> | ||
+ | SMIC<br> | ||
Toshiba<br> | Toshiba<br> | ||
Fujitsu<br> | Fujitsu<br> | ||
Line 136: | Line 129: | ||
Panasonic<br> | Panasonic<br> | ||
STM<br> | STM<br> | ||
− | + | UMC<br> | |
IBM<br> | IBM<br> | ||
− | |||
− | |||
GF<br> | GF<br> | ||
Samsung<br> | Samsung<br> | ||
Line 147: | Line 138: | ||
Panasonic<br> | Panasonic<br> | ||
STM<br> | STM<br> | ||
− | + | UMC<br> | |
IBM<br> | IBM<br> | ||
− | |||
− | |||
GF<br> | GF<br> | ||
Samsung<br> | Samsung<br> | ||
Line 157: | Line 146: | ||
| | | | ||
IBM<br> | IBM<br> | ||
− | |||
− | |||
GF<br> | GF<br> | ||
Samsung<br> | Samsung<br> | ||
Line 164: | Line 151: | ||
Intel | Intel | ||
| | | | ||
− | |||
− | |||
− | |||
GF<br> | GF<br> | ||
Samsung<br> | Samsung<br> | ||
Line 172: | Line 156: | ||
Intel | Intel | ||
| | | | ||
− | |||
Samsung<br> | Samsung<br> | ||
TSMC<br> | TSMC<br> | ||
Line 181: | Line 164: | ||
Intel | Intel | ||
| | | | ||
− | + | Future | |
− | |||
− | |||
|- | |- | ||
| [[180 nm]] | | [[180 nm]] |