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=== Convolution Core === | === Convolution Core === | ||
For the convolutional core there is usually one input activation along with a set of kernels. As with the memory interface, the number of pixels taken from the input is parameterizable along with the number of kernels. Typically, a strip of 16-32 outputs is calculated at a time. In order to safe power, the one weights of the MACs remain constant for a number of cycles. This also helps reduces data transfers. | For the convolutional core there is usually one input activation along with a set of kernels. As with the memory interface, the number of pixels taken from the input is parameterizable along with the number of kernels. Typically, a strip of 16-32 outputs is calculated at a time. In order to safe power, the one weights of the MACs remain constant for a number of cycles. This also helps reduces data transfers. | ||
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== Configuration == | == Configuration == |
Facts about "NVDLA - Microarchitectures - Nvidia"
codename | NVDLA + |
designer | Nvidia + |
first launched | 2018 + |
full page name | nvidia/microarchitectures/nvdla + |
instance of | microarchitecture + |
manufacturer | TSMC + |
name | NVDLA + |