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|-
 
|-
 
| STC || 1B || 1 || 1 || C ← 1 || Set carry flag ||  
 
| STC || 1B || 1 || 1 || C ← 1 || Set carry flag ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
 
| XC || 1A || 1 || 1 || C ↔ C' || Exchange carry flag with carry save ||
 
| XC || 1A || 1 || 1 || C ↔ C' || Exchange carry flag with carry save ||
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
 
| RAR || 30 || 1 || 1 || C → A<sub>CC</sub> → C || Rotate accumulator right through carry flag ||  
 
| RAR || 30 || 1 || 1 || C → A<sub>CC</sub> → C || Rotate accumulator right through carry flag ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
 
| INM || 1D || 1 || 1 + skip || (DP) = (DP) + 1 || Increment RAM content pointed by DP, skip if result is zero || on (DP) = 0
 
| INM || 1D || 1 || 1 + skip || (DP) = (DP) + 1 || Increment RAM content pointed by DP, skip if result is zero || on (DP) = 0
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
 
| DEM || 1F || 1 || 1 + skip || (DP) = (DP) - 1 || Decrement RAM content pointed by DP, skip if result is 0Fh || on (DP) = 0Fh
 
| DEM || 1F || 1 || 1 + skip || (DP) = (DP) - 1 || Decrement RAM content pointed by DP, skip if result is 0Fh || on (DP) = 0Fh
 
|-
 
|-
 
| AD || 08 || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) || Add RAM content pointed by DP to accumulator, skip if overflow || on overflow  
 
| AD || 08 || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) || Add RAM content pointed by DP to accumulator, skip if overflow || on overflow  
 
|-
 
|-
−
| ADS || 09 || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) + C<br />C ← 1 on overflow || Add RAM content pointed by DP with carry to accumulator<br />If overflow set carry flag and skip || on overflow   
+
| ADS || 09 || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) + C; C ← 1 on overflow || Add RAM content pointed by DP with carry to accumulator, if overflow set carry flag and skip || on overflow   
 
|-
 
|-
−
| ADC || 19 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) + C<br />C ← 1 on overflow || Add RAM content pointed by DP with carry to accumulator<br />If overflow set carry flag ||  
+
| ADC || 19 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> + (DP) + C; C ← 1 on overflow || Add RAM content pointed by DP with carry to accumulator, if overflow set carry flag ||  
 
|-
 
|-
 
| DAA || 06 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> + 6 || Decimal adjust accumulator for BCD addition ||  
 
| DAA || 06 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> + 6 || Decimal adjust accumulator for BCD addition ||  
Line 52: Line 52:
 
| EXL || 18 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> ^ (DP) || Exclusive-or accumulator with RAM content pointed by DP ||  
 
| EXL || 18 || 1 || 1 || A<sub>CC</sub> ← A<sub>CC</sub> ^ (DP) || Exclusive-or accumulator with RAM content pointed by DP ||  
 
|-
 
|-
−
| LI || 90 + D[3:0] || 1 || 1 || A<sub>CC</sub> ← D[3:0] || Load accumulator with immediate data D[3:0] || 
+
| LI || || 1 ||  
 
|-
 
|-
−
| S || 02 || 1 || 1 || (DP) ← A<sub>CC</sub> || Store accumulator into RAM location pointed by DP || 
+
| S || || 1 ||  
 
|-
 
|-
−
| L || 38 || 1 || 1 || A<sub>CC</sub> ← (DP) || Load accumulator with RAM content pointed by DP ||  
+
| L || || 1 ||  
 
|-
 
|-
−
| LM || 38 + D[1:0] || 1 || 1 || A<sub>CC</sub> ← (DP)<br />DP<sub>H</sub> ← DP<sub>H</sub> ^ D[1:0] || Load accumulator with RAM content pointed by DP;<br />Exclusive-or DP<sub>H</sub> with immediate data D[1:0] ||
+
| LM || || 1 ||  
 
|-
 
|-
−
| X || 28 || 1 || 1 || A<sub>CC</sub> ↔ (DP) || Exchange accumulator with RAM content pointed by DP ||  
+
| X || || 1 ||  
 
|-
 
|-
−
| XM || 28 + D[1:0] || 1 || 1 || A<sub>CC</sub> ↔ (DP)<br />DP<sub>H</sub> ← DP<sub>H</sub> ^ D[1:0] || Exchange accumulator with RAM content pointed by DP;<br />Exclusive-or DP<sub>H</sub> with immediate data D[1:0] ||  
+
| XM || || 1 ||  
 
|-
 
|-
−
| XD || 2C || 1 || 1 + skip || || ||
+
| XD || || 1 ||  
 
|-
 
|-
−
| XMD || 2C + D[1:0] || 1 || 1 + skip || || ||
+
| XMD || || 1 ||  
 
|-
 
|-
−
| XI || 3C || 1 || 1 + skip || || ||  
+
| XI || || 1 ||  
 
|-
 
|-
−
| XMI || 3C + D[1:0] || 1 || 1 + skip || || ||
+
| XMI || || 1 ||  
 
|-
 
|-
−
| LDI || 15 00 + D[6:0] || 2 || 2 || || ||  
+
| LDI || || 2 ||  
 
|-
 
|-
−
| LDZ || 80 + D[3:0] || 1 || 1 || || ||  
+
| LDZ || || 1 ||  
 
|-
 
|-
−
| DED || 13 || 1 || 1 + skip || || ||  
+
| DED || || 1 ||  
 
|-
 
|-
−
| IND || 33 || 1 || 1 + skip || || ||
+
| IND || || 1 ||  
 
|-
 
|-
−
| TAL || 07 || 1 || 1 || || ||
+
| TAL || || 1 ||  
 
|-
 
|-
−
| TLA || 12 || 1 || 1 || || ||  
+
| TLA || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XHX || 4F || 1 ||  2 || || ||  
+
| XHX || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XLY || 4E || 1 ||  2 || || ||  
+
| XLY || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| THX || 47 || 1 ||  2 || || ||  
+
| THX || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| TLY || 46 || 1 || 2 || || || 
+
| TLY || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XAZ || 4A || 1 || 2 || || || 
+
| XAZ || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XAW || 4B || 1 || 2 || || || 
+
| XAW || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| TAZ || 42 || 1 ||  2 || || ||  
+
| TAZ || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| TAW || 43 || 1 ||  2 || || ||  
+
| TAW || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XHR || 4D || 1 || 2 || || ||  
+
| XHR || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| XLS || 4C || 1 || 2 || || || 
+
| XLS || || 1 ||  
 
|-
 
|-
−
| SMB || 78 + D[1:0] || 1 || 1 || || ||
+
| SMB || || 1 ||  
 
|-
 
|-
−
| RMB || 68 + D[1:0] || 1 || 1 || || ||
+
| RMB || || 1 ||  
 
|-
 
|-
−
| TMB || 58 + D[1:0] || 1 || 1 + skip || || ||  
+
| TMB || || 1 ||  
 
|-
 
|-
−
| TAB || 24 + D[1:0] || 1 || 1 + skip || || ||  
+
| TAB || || 1 ||  
 
|-
 
|-
−
| CMB || 34 + D[1:0] || 1 || 1 + skip || || ||  
+
| CMB || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| SFB || 7C + D[1:0] || 1 || 2 || || ||
+
| SFB || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| RFB || 6C + D[1:0] || 1 || 2 || || ||
+
| RFB || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| FBT || 5C + D[1:0] || 1 || 2 + skip || || ||
+
| FBT || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| FBF || 20 + D[1:0] || 1 || 2 + skip || || ||
+
| FBF || || 1 ||  
 
|-
 
|-
−
| CM || 0C || 1 || 1 + skip || || || 
+
| CM || || 1 ||  
 
|-
 
|-
−
| CI || 17 C0 + D[3:0] || 2 || 2 + skip || || ||  
+
| CI || || 2 ||  
 
|-
 
|-
−
| CLI || 16 E0 + D[3:0] || 2 || 2 + skip || || ||
+
| CLI || || 2 ||  
 
|-
 
|-
−
| TC || 04 || 1 || 1 + skip || || ||  
+
| TC || || 1 ||  
 
|-
 
|-
−
| TIT || 03 || 1 || 1 + skip || || ||
+
| TIT || || 1 ||  
 
|-
 
|-
−
| JCP || C0 + D[5:0] || 1 || 1 || || ||
+
| JCP || || 1 ||  
 
|-
 
|-
−
| JMP || A0 + D[10:8]<br /> 00 + D[7:0] || 2 || 2 || || ||  
+
| JMP || || 2 ||  
 
|-
 
|-
−
| JPA || 41 || 1 || 2 || || || 
+
| JPA || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| EI || 31 || 1 || 1 || || ||
+
| EI || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| DI || 01 || 1 || 1 || || ||  
+
| DI || || 1 ||  
 
|-
 
|-
−
| CZP || B0 + D[3:0] || 1 || 1 || || ||
+
| CZP || || 1 ||  
 
|-
 
|-
−
| CAL || A8 + D[10:8]<br /> 00 + D[7:0] || 2 || 2 || || ||  
+
| CAL || || 2 ||  
 
|-
 
|-
−
| RT || 48 || 1 || 2 ||
+
| RT || || 1 ||  
 
|-
 
|-
−
| RTS || 49 || 1 || 2 + skip || || ||
+
| RTS || || 1 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| STM || 14 80 + D[5:0] || 2 || 2 || || || 
+
| STM || || 2 ||  
−
|- style="background: #cfc;"
+
|- style="background: #ccffcc;"
−
| TTM || 05 || 1 || 1 + skip || || ||
+
| TTM || || 1 ||  
 
|-
 
|-
−
| SEB || 74 + D[1:0] || 1 || 2 || || ||
+
| SEB || || 1 ||  
 
|-
 
|-
−
| REB || 64 + D[1:0] || 1 || 2 || || ||
+
| REB || || 1 ||  
 
|-
 
|-
−
| SPB || 70 + D[1:0] || 1 || 1 || || ||  
+
| SPB || || 1 ||  
 
|-
 
|-
−
| RPB || 60 + D[1:0] || 1 || 1 || || ||
+
| RPB || || 1 ||  
 
|-
 
|-
−
| TPA || 54 + D[1:0] || 1 || 2 + skip || || ||
+
| TPA || || 1 ||  
 
|-
 
|-
−
| TPB || 50 + D[1:0] || 1 || 1 + skip || || ||  
+
| TPB || || 1 ||  
 
|-
 
|-
−
| OE || 44 || 1 || 2 || || ||
+
| OE || || 1 ||  
 
|-
 
|-
−
| OP || 0E || 1 || 1 || || ||  
+
| OP || || 1 ||  
 
|-
 
|-
−
| OCD || 1E 00 + D[7:0] || 2 || 2 || PORT[C,D] ← I<sub>7</sub>-I<sub>0</sub> || ||
+
| OCD || || 2 || 2 || PORT[C,D] ← I<sub>7</sub>-I<sub>0</sub> ||
 
|-
 
|-
−
| IA || 40 || 1 || 2 || A<sub>CC</sub> ← PORT[A] || ||
+
| IA || || 2 || 2 || A<sub>CC</sub> ← PORT[A] ||
 
|-
 
|-
−
| IP || 32 || 1 || 1 || A<sub>CC</sub> ← PORT[DP<sub>L</sub>] || ||
+
| IP || || 1 || 1 || A<sub>CC</sub> ← PORT[DP<sub>L</sub>] ||
 
|-
 
|-
−
| [[NOP]] || 00 || 1 || 1 || [[no operation]] || ||
+
| [[NOP]] || || 1 || 1 || [[no operation]] ||
 
|}
 
|}
  
Line 184: Line 184:
 
* [[:File:NEC μCOM4345 ISA.pdf|ISA data sheet]]
 
* [[:File:NEC μCOM4345 ISA.pdf|ISA data sheet]]
  
−
== References ==
 
−
*NEC Electronics (Europe) GmbH, 1982 Catalog, "μCOM-4: 4-Bit Single Chip Microcomputer Family", 143-176 pp.
 
−
 
 
== See also ==
 
== See also ==
 
* {{nec|μCOM-4}}
 
* {{nec|μCOM-4}}
 
* {{nec|μCOM-8}}
 
* {{nec|μCOM-8}}
 
* {{nec|μCOM-8/isa|μCOM-8 ISA}}
 
* {{nec|μCOM-8/isa|μCOM-8 ISA}}

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