Editing intrinsity/fast14

{{intrinsity title|Fast14}}
'''Fast14 Technology''' (stylized '''Fast<sub>14</sub> Technology''') is a proprietary technology designed and patented by [[Intrinsity]] for implemented high-performance (multi-GHz) [[cmos/dynamic|dynamic]] [[cmos/domino|domino logic]].  Since 2010 the technology has been acquired by [[Apple]].

Previously Fast14 has been used to implement some well known models, including [[ARM]]'s {{\|Cortex-R4X}} [[IP Core]], Samsung's {{samsung|Hummingbird}}'s, and Intrinsity's own {{\|FastMATH}} and {{\|FastMIPS}}. Fast14 has also been known to be implemented [[ATI]]'s products.

== Overview ==
Intrinsity's platform is composed of an entire design methodology for producing highly efficient dynamic logic. This is done through:

* Fast<sub>14</sub> - 1-of-N Dynamic Logic (NDL) family
* Build<sub>14</sub> - Block Build Environment - block building tool for generating custom NDL blocks automatically.
* Plan<sub>14</sub> - Floorplanning and Integration Environment - tool for managing floorplanning and integration of the NDL blocks designed.  Custom and [[Verilog]]-based APR blocks are also supported. Output generate is an [[GDSII]] output of the entire chip/block/[[SoC]].
* Finish<sub>14</sub> - Design for Manufacturability Environment. Streamlines manufacturability by opportunistically doubling contacts and vias, enhances wire shielding and produces smart density fill, power or ground, density fills reduce floating metal, and improves the integrity of the power grid. Inputs GDSII or PGNS layouts; Outputs LVS and DRC clean layout
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 * Plan<sub>14</sub> - Floorplanning and Integration Environment - tool for managing floorplanning and integration of the NDL blocks designed.  Custom and [[Verilog]]-based APR blocks are also supported. Output generate is an [[GDSII]] output of the entire chip/block/[[SoC]].
 * Finish<sub>14</sub> - Design for Manufacturability Environment. Streamlines manufacturability by opportunistically doubling contacts and vias, enhances wire shielding and produces smart density fill, power or ground, density fills reduce floating metal, and improves the integrity of the power grid. Inputs GDSII or PGNS layouts; Outputs LVS and DRC clean layout
-== Documents ==
-* [[:File:Fast14 Overview.pdf|Fast14 Overview]]
-* [[:File:Fast14 Technology.pdf|Fast14 Technology]]