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Difference between revisions of "intel/xeon e3/e3-1280 v6"
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|core name=Kaby Lake DT
 
|core name=Kaby Lake DT
 
|core family=6
 
|core family=6
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|core model=158
 
|core stepping=B0
 
|core stepping=B0
 
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|process=14 nm
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|tstorage max=125 °C
 
|tstorage max=125 °C
 
|package module 1={{packages/intel/lga-1151}}
 
|package module 1={{packages/intel/lga-1151}}
 
 
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'''Xeon E3-1280 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The E3-1280 v6 operates at 3.9 GHz with a TDP of 72 W supporting a {{intel|Turbo Boost}} frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. This model has no integrated graphics processor.
 
'''Xeon E3-1280 v6''' is a {{arch|64}} [[quad-core]] [[x86]] workstation/entry server microprocessor introduced by [[Intel]] in early [[2017]]. This chip, which is based on the {{intel|Kaby Lake|l=arch}} microarchitecture, is fabricated on Intel's [[14 nm process|14nm+ process]]. The E3-1280 v6 operates at 3.9 GHz with a TDP of 72 W supporting a {{intel|Turbo Boost}} frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. This model has no integrated graphics processor.

Revision as of 00:53, 30 June 2017

Template:mpu Xeon E3-1280 v6 is a 64-bit quad-core x86 workstation/entry server microprocessor introduced by Intel in early 2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The E3-1280 v6 operates at 3.9 GHz with a TDP of 72 W supporting a Turbo Boost frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. This model has no integrated graphics processor.

Cache

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back

L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1866, DDR4-2400
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics

This processor has no integrated graphics processor.

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E3-1280 v6 - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description16-way set associative +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR3L-1866 + and DDR4-2400 +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +