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== Overview == | == Overview == | ||
− | Alder Lake departs from all prior Intel SoCs by featuring the company's first mainstream implementation of a single-ISA heterogeneous multi-core microarchitecture. While not the first ({{\\|Lakefield}} was), Alder Lake is the first to target all market segments from mobile to desktop and workstation. The overall microarchitecture builds on its predecessor, {{\\|Tigerlake}} but expends on its by integrating two vastly different types of cores - up to eight [[big cores]] based on the {{\\|Golden Cove}} microarchitecture and up to eight [[small cores]] based on the {{\\|Gracemont}} microarchitecture. The big cores are designed to push single-thread performance while the small cores are designed to push multi-thread power efficiency. By finely orchestrating thread scheduling based on performance demand, Alder Lake is able to provide both higher multi-threading performance-efficiency and better single-thread performance. | + | Alder Lake departs from all prior Intel SoCs by featuring the company's first mainstream implementation of a single-ISA heterogeneous multi-core microarchitecture. While not the first ({{\\|Lakefield}} was), Alder Lake is the first to target all market segments from mobile to desktop and workstation. The overall microarchitecture builds on its its predecessor, {{\\|Tigerlake}} but expends on its by integrating two vastly different types of cores - up to eight [[big cores]] based on the {{\\|Golden Cove}} microarchitecture and up to eight [[small cores]] based on the {{\\|Gracemont}} microarchitecture. The big cores are designed to push single-thread performance while the small cores are designed to push multi-thread power efficiency. By finely orchestrating thread scheduling based on performance demand, Alder Lake is able to provide both higher multi-threading performance-efficiency and better single-thread performance. |
=== SoC design === | === SoC design === |
Facts about "Alder Lake - Microarchitectures - Intel"
codename | Alder Lake + |
designer | Intel + |
first launched | 2021 + |
full page name | intel/microarchitectures/alder lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Alder Lake + |
processing element count | 32 EU igpu + and 96 EU igpu + |