Semiconductor & Computer Engineering
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In addition to [[x86]], Intel used to also design and manufacture [[ARM]]-based chips as well as embed [[ARC]]-based cores in their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a architectural level ARM license allowing them to design and sell their own ARM devices should they wish to. | In addition to [[x86]], Intel used to also design and manufacture [[ARM]]-based chips as well as embed [[ARC]]-based cores in their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a architectural level ARM license allowing them to design and sell their own ARM devices should they wish to. | ||
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== Find Chip == | == Find Chip == | ||
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}} | }} | ||
| − | == List of architectures == | + | == List of instruction set architectures == |
{{collist | {{collist | ||
| count = 1 | | count = 1 | ||
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* [[x86]] | * [[x86]] | ||
* {{\\|Configurable Spatial Accelerator}} (CSA) | * {{\\|Configurable Spatial Accelerator}} (CSA) | ||
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}} | }} | ||
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* {{intel|Enhanced NetBurst|l=arch}} | * {{intel|Enhanced NetBurst|l=arch}} | ||
}} | }} | ||
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{{collist | {{collist | ||
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| style= margin-left: 20px; | | style= margin-left: 20px; | ||
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| − | '''Client | + | '''Client:''' |
* {{intel|Core (client)|l=arch}} | * {{intel|Core (client)|l=arch}} | ||
* {{intel|Penryn (client)|l=arch}} | * {{intel|Penryn (client)|l=arch}} | ||
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* {{intel|Amber Lake|l=arch}} | * {{intel|Amber Lake|l=arch}} | ||
* {{intel|Comet Lake|l=arch}} | * {{intel|Comet Lake|l=arch}} | ||
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* {{intel|Cannon Lake|l=arch}} ("Skymont") | * {{intel|Cannon Lake|l=arch}} ("Skymont") | ||
* {{intel|Ice Lake (client)|l=arch}} | * {{intel|Ice Lake (client)|l=arch}} | ||
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}} | }} | ||
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{{collist | {{collist | ||
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| style= margin-left: 20px; | | style= margin-left: 20px; | ||
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| − | '''Server | + | '''Server:''' |
* {{intel|Core (server)|l=arch}} | * {{intel|Core (server)|l=arch}} | ||
* {{intel|Penryn (server)|l=arch}} | * {{intel|Penryn (server)|l=arch}} | ||
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* {{intel|Emerald Rapids|l=arch}} | * {{intel|Emerald Rapids|l=arch}} | ||
* {{intel|Granite Rapids|l=arch}} | * {{intel|Granite Rapids|l=arch}} | ||
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}} | }} | ||
| − | + | '''ULP ([[x86]]):''' | |
{{collist | {{collist | ||
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* {{intel|Bonnell|l=arch}} | * {{intel|Bonnell|l=arch}} | ||
* {{intel|Saltwell|l=arch}} | * {{intel|Saltwell|l=arch}} | ||
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* {{intel|Tremont|l=arch}} | * {{intel|Tremont|l=arch}} | ||
}} | }} | ||
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'''MCU:''' | '''MCU:''' | ||
{{collist | {{collist | ||
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* {{intel|Lakemont|l=arch}} | * {{intel|Lakemont|l=arch}} | ||
}} | }} | ||
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'''ULP ([[ARM]]):''' | '''ULP ([[ARM]]):''' | ||
{{collist | {{collist | ||
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* Continued by [[Marvell]] .. | * Continued by [[Marvell]] .. | ||
}} | }} | ||
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'''Server (EPIC) ([[Itanium]]):''' | '''Server (EPIC) ([[Itanium]]):''' | ||
{{collist | {{collist | ||
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* {{intel|Lakefield|l=arch}} | * {{intel|Lakefield|l=arch}} | ||
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}} | }} | ||
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* {{intel|Arctic Sound|l=arch}} | * {{intel|Arctic Sound|l=arch}} | ||
* {{intel|Jupiter Sound|l=arch}} | * {{intel|Jupiter Sound|l=arch}} | ||
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}} | }} | ||
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* {{\\|Dynamic Tuning}} | * {{\\|Dynamic Tuning}} | ||
* {{\\|Hyper Scaling}} | * {{\\|Hyper Scaling}} | ||
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* {{\\|Turbo Boost Technology}} (TBT) | * {{\\|Turbo Boost Technology}} (TBT) | ||
* {{\\|Thermal Velocity Boost}} (TVB) | * {{\\|Thermal Velocity Boost}} (TVB) | ||
* {{\\|DL Boost}} | * {{\\|DL Boost}} | ||
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}} | }} | ||
Facts about "Intel"
| company type | public + |
| founded | July 18, 1968 + |
| founded location | Mountain View, California + |
| founder | Gordon Moore +, Robert Noyce + and Andrew Grove + |
| full page name | intel + |
| headquarters | Santa Clara, California + |
| instance of | semiconductor company + |
| name | Intel + |
| website | http://www.intel.com + |
| wikidata id | Q248 + |
