Editing deep trench capacitor

{{title|Deep Trench Capacitor (DTC)}}[[File:ibm 32-nanometer deep trench capacitors.png|right|thumb|[[IBM]] [[32-nanometer]] DTCs used for [[eDRAM]].]]
A '''deep trench capacitor''' ('''DTC''') is a three-dimentional vertical [[capacitor]] formed by etching a [[deep trench]] (DT) into a silicon substrate.

== Overview ==
Deep trench capacitors (DTCs) are vertical semiconductor devices that are used to add capacitance to various integrated circuits. 

=== Memory ===
DTCs form the main storage capacitor for one of the main families of [[DRAM]]-based cells called 'Embedded DRAM' which is fabricated on a standard CMOS process, allowing the mixture of memory and logic on the same integrated circuit (as opposed to generic [[DRAM]] ICs which relies on a special [[process technology|process]] not suitable for general logic).

=== Logic ===
DTCs are unique in many ways from other capacitors. First, they are formed by etching [[deep trenches]] (DTs) into the substrate. This enables very high capacitance density, especially when they are coupled in parallel. Secondly, because they tend to be very thin and deep, when combined with the logic above, they may be used to form very dense structures such as embedded DRAM, PLL loop filters, decoupling circuitry, and other power applications.

== Industry ==
DTCs are used by a number of semiconductor companies in volume production:

* IBM uses DTCs for their [[eDRAM]] technology which are used to build very fast and very large [[L2]], [[L3]], and [[L4]] caches. 
* TSMC added DTCs called {{tsmc|iCAPs}} to its [[CoWoS]] packaging technology, significantly increasing the [[capacitance density]] allowing construction of higher quality [[power delivery network]]s (PDN)
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== See also ==
* [[stacked capacitor]]
* [[capacitor over bit]] (CoB)
* [[embedded DRAM]]
* [[deep trench]]