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cmos/static
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Revision as of 16:01, 13 March 2014 by 65.78.114.251 (talk)

Static CMOS is a logic circuit design technique whereby the output is always strongly driven due to it always being connected to either Vcc or GND (except when switching). This design is in contrast to Dynamic CMOS which relies on the temporary storage of signal using various load capacitances.

Overview

A static CMOS circuit is composed of two networks:

  • pull-up network (PUN) - a set of PMOS transistors connected between Vcc and the output line
  • pull-down network (PDN) - a set of NMOS transistors connected between GND and the output line

Components designed out pull-up and pull-down networks operate in a mutually exclusive way; in a steady state there is never a direct path between Vcc and GND. Devices that are made up of PUN/PDN are always strongly driven and therefore offers strong immunity from noise.