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{{arm title|ARMv1}}{{arm isa main}} | {{arm title|ARMv1}}{{arm isa main}} | ||
− | '''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{ | + | '''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{armh|ARM1}} on April 26 1985, the ARMv1 defines a {{arch|32}} ISA along with {{arm|26-bit|26-bit addressing space}}. The ARMv1 was only implemented by the {{armh|ARM1}} and was replaced soon after by the {{armh|ARM2}}. Only a few hundred of those chips were ever fabricated. |
== Overview == | == Overview == | ||
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== Registers == | == Registers == | ||
There are 16 [[general purpose registers|general purpose]] 32-bit registers. With the exception of {{arm|R15|register 15}} and 14, all registers are orthogonal with no specific designated purpose. | There are 16 [[general purpose registers|general purpose]] 32-bit registers. With the exception of {{arm|R15|register 15}} and 14, all registers are orthogonal with no specific designated purpose. | ||
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== Instruction Listing == | == Instruction Listing == | ||
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== Multiplication and Floating Point == | == Multiplication and Floating Point == | ||
ARMv1 does not have support for multiplication. Software that requires multiplication will have to resort to a software implementation (e.g., [[Shift-and-Add Multiplication]]). This was considerably slow and was consequently added in later ARM versions. Likewise there was no support for hardware floating point or an ability to do such operations on an external FPU coprocessor. | ARMv1 does not have support for multiplication. Software that requires multiplication will have to resort to a software implementation (e.g., [[Shift-and-Add Multiplication]]). This was considerably slow and was consequently added in later ARM versions. Likewise there was no support for hardware floating point or an ability to do such operations on an external FPU coprocessor. | ||
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