From WikiChip
Difference between revisions of "amd/k6/amd-k6-pr2-200alr"
< amd‎ | k6

m (Bot: replacing deprecated (and now obselete) {{mpu features}} with {{x86 features}})
m (Bot: moving all {{mpu}} to {{chip}})
 
Line 1: Line 1:
 
{{amd title|AMD-K6/PR2-200ALR}}
 
{{amd title|AMD-K6/PR2-200ALR}}
{{mpu
+
{{chip
 
| name                = AMD-K6/PR2-200ALR
 
| name                = AMD-K6/PR2-200ALR
 
| no image            = Yes
 
| no image            = Yes

Latest revision as of 16:09, 13 December 2017

Edit Values
AMD-K6/PR2-200ALR
General Info
DesignerAMD
ManufacturerAMD
Model NumberAMD-K6/PR2-200ALR
Part NumberAMD-K6/PR2-200ALR
MarketDesktop
IntroductionApril 2, 1997 (announced)
April 2, 1997 (launched)
ShopAmazon
General Specs
FamilyK6
SeriesDesktop K6
LockedNo
Frequency199.99 MHz
Bus typeFSB
Bus speed66.66 MHz
Bus rate66.66 MT/s
Clock multiplier3
CPUID560
Microarchitecture
MicroarchitectureK6
Core Name6k86
Core Family5
Core Model6
Process350 nm
Transistors8,800,000
TechnologyCMOS
Die162 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation20 W
Vcore2.9 V ± 5%
VI/O3.3 V ± 5%
Tcase0 °C – 70 °C
Tstorage-65 °C – 150 °C

AMD-K6/PR2-200ALR was a 32-bit x86 microprocessor designed by AMD and introduced in early 1997. This chip was based on AMD's new K6 microarchitecture and was marketed as a 200 MHz Pentium II-equivalent processor. The PR2 rating was actually superfluous as the chip operated at 166 MHz anyway and performed just as well or better (AMD got rid of PR2 altogether in later models).

Cache[edit]

Main article: K6 § Cache

L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
  • Auto-power down state
  • Stop clock state
l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +