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{{DISPLAYTITLE:List of AMD CPU sockets}}
+
{{amd title|List of AMD CPU sockets}}
[[Category:amd]]
+
 
 +
{{work-in-progress}}
  
 
== Overview ==
 
== Overview ==
Line 12: Line 13:
 
|2000||{{amd|Socket A|l=package}}||||||{{amd|Socket A|l=package}}||||
 
|2000||{{amd|Socket A|l=package}}||||||{{amd|Socket A|l=package}}||||
 
|-
 
|-
|2003||{{amd|Socket 754|754|l=package}}, {{amd|Socket 940|940|l=package}}||||{{amd|Socket 940|940|l=package}}||{{amd|Socket 563|563|l=package}}, {{amd|Socket 754|754|l=package}}||||
+
|2003||{{amd|Socket 754|754|l=package}}, {{amd|Socket 940|940|l=package}}||||{{amd|Socket 940|940|l=package}}||{{amd|Socket 754|754|l=package}}||||
 
|-
 
|-
 
|2004||{{amd|Socket 939|939|l=package}}||||||||||
 
|2004||{{amd|Socket 939|939|l=package}}||||||||||
Line 42: Line 43:
 
|2018||||||||{{amd|FP5|l=package}}||||{{amd|FP5|l=package}}, {{amd|SP4|l=package}}, {{amd|SP4r2|l=package}}
 
|2018||||||||{{amd|FP5|l=package}}||||{{amd|FP5|l=package}}, {{amd|SP4|l=package}}, {{amd|SP4r2|l=package}}
 
|-
 
|-
|2019||{{amd|Socket sTRX4|sTRX4|l=package}}||||||||||
+
|2019||{{amd|Socket TRX4|TRX4|l=package}}||||||||||
|-
 
|2020||{{amd|Socket sWRX8|sWRX8|l=package}}||||||{{amd|FP6|l=package}}||{{amd|FT5|l=package}}||{{amd|FP6|l=package}}
 
 
|-
 
|-
|2022||{{amd|Socket AM5|AM5|l=package}}||{{amd|Socket AM5|AM5|l=package}}||{{amd|Socket SP5|SP5|l=package}}||||||
+
|2020||||||||{{amd|FP6|l=package}}||{{amd|FT5|l=package}}||{{amd|FP6|l=package}}
 
|}
 
|}
  
== Desktop/{{abbr|HEDT}}/Workstation Sockets ==
+
== Desktop sockets ==
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
! Name (a.k.a.)
+
!Name (a.k.a.)!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
! Year
 
! Type<ref>PGA = Pin Grid Array, BGA = Ball Grid Array (CPU package soldered directly to the motherboard), LGA = Land Grid Array, SEC = Single Edge Cartridge (printed circuit board with an edge connector similar to graphics cards).</ref>
 
! Contacts
 
! {{amd|CPUID|x86 CPU Family}}
 
! MC<ref>If processors for this socket integrate a Memory Controller, the number of independent channels times the maximum channel width in bits, including [[ECC]] lanes. Not all processors for this socket may support ECC.</ref>
 
! I/O lanes<ref>FSB = Front Side Bus (memory and I/O interfaces provided by the chipset), HTx = HyperTransport generation x link (I/O interfaces provided by the chipset), PCIex = Peripheral Component Interconnect Express generation x link. Note HT and PCIe links support bifurcation, e.g. 1x16 into 2x8 links. The table lists the maximum number of lanes and interfaces. Some processors may support fewer, and some motherboards may use alternative functions of these pins.</ref>
 
! APU<ref>This socket has graphics interfaces (DisplayPort, HDMI, VGA, etc.) to accommodate Accelerated Processing Units i.e. processors with integrated graphics. Not all processors for this socket may integrate a graphics processor.</ref>
 
! FCH<ref>The number of dedicated I/O lanes to the Fusion Controller Hub a.k.a. chipset, equivalent to Intel's Platform Controller Hub. The FCH mainly serves as an I/O expander. A controller hub may be integrated on the processor, in this case the CPU package and socket has suitable I/O interfaces (USB, SATA, {{abbr|LPC}}, {{abbr|SMBus}}, etc.), sometimes in addition to the FCH interface.</ref>
 
! Notes
 
! Package<ref>CPU package bottom view, not to scale.</ref>
 
|-
 
|{{amd|Super Socket 7|l=package}}||1998||PGA||321||5||-||FSB||{{tchk|no}}||-||||[[File:CPGA-321.svg|x50px]]
 
|-
 
|{{amd|Slot A|l=package}}||1999||SEC||242||6||-||FSB||{{tchk|no}}||-||||
 
 
|-
 
|-
|{{amd|Socket A|l=package}}||2000||PGA||462||6||-||FSB||{{tchk|no}}||-||||[[File:OPGA-453.svg|x50px]] [[File:CPGA-453.svg|x50px]]
+
|{{amd|Super Socket 7|l=package}}||1998||PGA||321||||||FSB||||||||[[File:CPGA-321.svg|x50px]]
 
|-
 
|-
|{{amd|Socket 563|l=package}}||2003||PGA||563||6||-||FSB||{{tchk|no}}||-||||[[File:OPGA-563.svg|x50px]]
+
|{{amd|Slot A|l=package}}||1999||SEC||242||||||FSB||||||||
 
|-
 
|-
|{{amd|Socket 754|l=package}}||2003||PGA||754||0Fh||72 bit DDR||16 HT1||{{tchk|no}}||-||||[[File:OPGA-754.svg|x50px]]
+
|{{amd|Socket A|l=package}}||2000||PGA||462||||||FSB||||||||
 
|-
 
|-
|{{amd|Socket 940|l=package}}||2003||PGA||940||0Fh||144 bit DDR||3 × 16 HT1||{{tchk|no}}||-||||[[File:OPGA-940 S940.svg|x50px]] [[File:CPGA-940.svg|x50px]]
+
|{{amd|Socket 563|l=package}}||||PGA||563||||||FSB||||||||
 
|-
 
|-
|{{amd|Socket 939|l=package}}||2004||PGA||939||0Fh||144 bit DDR||16 HT1||{{tchk|no}}||-||||[[File:OPGA-939.svg|x50px]]
+
|{{amd|Socket 754|l=package}}||2003||PGA||754||||72 bit DDR||HT1||||||||[[File:OPGA-754.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM2|l=package}}||2006||PGA||940||NPT 0Fh||144 bit DDR2||16 HT1||{{tchk|no}}||-||||[[File:OPGA-940 AM2.svg|x50px]]
+
|{{amd|Socket 940|l=package}}||2003||PGA||940||||144 bit DDR||3 × 16 HT1||||||||[[File:OPGA-940 S940.svg|x50px]] [[File:CPGA-940.svg|x50px]]
 
|-
 
|-
|{{amd|Socket F|Socket Fr3|l=package}}||2006||LGA||1207||NPT 0Fh||2 × 72 bit DDR2||3 × 16 HT1||{{tchk|no}}||-||||[[File:LGA-1207 F.svg|x50px]]
+
|{{amd|Socket 939|l=package}}||2004||PGA||939||||144 bit DDR||HT1||||||||[[File:OPGA-939.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM2+|l=package}} (AM2r2)||2007||PGA||940||10h||2 × 72 bit DDR2||16 HT3||{{tchk|no}}||-||||[[File:OPGA-940 AM2.svg|x50px]]
+
|{{amd|Socket AM2|l=package}}||2006||PGA||940||0Fh||144 bit DDR2||HT1||||||||[[File:OPGA-940 AM2.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM3|l=package}}||2009||PGA||938||10h||2 × 72 bit DDR2/3||16 HT3||{{tchk|no}}||-||||[[File:OPGA-938.svg|x50px]] [[File:OPGA-940 AM3.svg|x50px]]
+
|{{amd|Socket F|Socket Fr3|l=package}}||2006||LGA||1207||0Fh||2 × 72 bit DDR2||3 × 16 HT1||||||||[[File:LGA-1207 F.svg|x50px]]
 
|-
 
|-
|{{amd|Socket FM1|l=package}}||2011||PGA||905||12h||2 × 72 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:OPGA-905.svg|x50px]]
+
|{{amd|Socket AM2+|l=package}} (AM2r2)||2007||PGA||940||10h||2 × 72 bit DDR2||HT3||||||||[[File:OPGA-940 AM2.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM3+|l=package}} (AM3b)||2012||PGA||941||15h||2 × 72 bit DDR3||16 HT3||{{tchk|no}}||-||||[[File:OPGA-941.svg|x50px]]
+
|{{amd|Socket AM3|l=package}}||2009||PGA||938||10h||2 × 72 bit DDR2/3||HT3||||||||[[File:OPGA-938.svg|x50px]] [[File:OPGA-940 AM3.svg|x50px]]
 
|-
 
|-
|{{amd|Socket FM2|l=package}}||2012||PGA||904||15h||2 × 64 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:OPGA-904.svg|x50px]]
+
|{{amd|Socket FM1|l=package}}||2011||PGA||905||12h||2 × 72 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:OPGA-905.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM1|l=package}} (FS1b)||2014||PGA||721||16h||72 bit DDR3||4 + 4 PCIe2||{{tchk|yes}}||integrated||||[[File:OPGA-721.svg|x50px]]
+
|{{amd|Socket AM3+|l=package}} (AM3b)||2012||PGA||941||15h||2 × 72 bit DDR3||HT3||||||||[[File:OPGA-941.svg|x50px]]
 
|-
 
|-
|{{amd|Socket FM2+|l=package}} (FM2b, FM2r2)||2014||PGA||906||15h||2 × 64 bit DDR3||16 + 4 PCIe2/3||{{tchk|yes}}||4 PCIe2||||[[File:OPGA-906.svg|x50px]]
+
|{{amd|Socket FM2|l=package}}||2012||PGA||904||15h||2 × 64 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:OPGA-904.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM4|l=package}}||2016||PGA||1331||15h, 17h, 19h||2 × 72 bit DDR3/4||16 + 4 PCIe3/4||{{tchk|yes}}||4 PCIe3/4||||[[File:socket_am4.svg|x50px]]
+
|{{amd|Socket AM1|l=package}} (FS1b)||2014||PGA||721||16h||72 bit DDR3||4 + 4 PCIe2||||integrated||||[[File:OPGA-721.svg|x50px]]
 
|-
 
|-
|{{amd|Socket TR4|l=package}} (SP3r2)||2017||LGA||4094||17h||4 × 72 bit DDR4||4 × 16 PCIe3||{{tchk|no}}||||||[[File:FCLGA-4094.svg|x50px]]
+
|{{amd|Socket FM2+|l=package}} (FM2b, FM2r2)||2014||PGA||906||15h||2 × 64 bit DDR3||16 + 4 PCIe2/3||||4 PCIe2||||[[File:OPGA-906.svg|x50px]]
 
|-
 
|-
|{{amd|Socket sTRX4|l=package}}||2019||LGA||4094||17h||4 × 72 bit DDR4||4 × 16 PCIe4||{{tchk|no}}||||||[[File:FCLGA-4094.svg|x50px]]
+
|{{amd|Socket AM4|l=package}}||2016||PGA||1331||15h, 17h, 19h||2 × 72 bit DDR3/4||16 + 4 PCIe3/4||||4 PCIe3/4||||[[File:socket_am4.svg|x50px]]
 
|-
 
|-
|{{amd|Socket sWRX8|l=package}}||2020||LGA||4094||17h, 19h||8 × 72 bit DDR4||8 × 16 PCIe4||{{tchk|no}}||||||[[File:FCLGA-4094.svg|x50px]]
+
|{{amd|Socket TR4|l=package}} (SP3r2)||2017||LGA||4094||17h||4 × 72 bit DDR4||4 × 16 PCIe3||||||||[[File:FCLGA-4094.svg|x50px]]
 
|-
 
|-
|{{amd|Socket AM5|l=package}}||2022||LGA||1718||19h||2 × 72 bit DDR5||16 + 4 + 4 PCIe4/5||{{tchk|yes}}||4 PCIe4/5||||[[File:LGA-1718.svg|x50px]]
+
|{{amd|Socket TRX4|l=package}} (SP3r3)||2019||LGA||4094||17h||4 × 72 bit DDR4||4 × 16 PCIe3/4||||||||[[File:FCLGA-4094.svg|x50px]]
 
|}
 
|}
<references/>
 
  
== Server Sockets ==
+
== Server sockets ==
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
!Name!!Year!!Type!!Contacts!!Fam.!!MC!!I/O lanes!!APU!!{{abbr|SCH|Server Controller Hub}}!!Notes!!Package
+
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
|-
 
|{{amd|Socket 940|l=package}}||2003||PGA||940||0Fh||144 bit DDR||3 × 16 HT1||{{tchk|no}}||-||||[[File:OPGA-940 S940.svg|x50px]] [[File:CPGA-940.svg|x50px]]
 
 
|-
 
|-
|{{amd|Socket F|l=package}}||2006||LGA||1207||NPT 0Fh||2 × 72 bit DDR2||3 × 16 HT1||{{tchk|no}}||-||||[[File:LGA-1207 F.svg|x50px]]
+
|{{amd|Socket 940|l=package}}||2003||PGA||940||||144 bit DDR||3 × 16 HT1||||||||[[File:OPGA-940 S940.svg|x50px]] [[File:CPGA-940.svg|x50px]]
 
|-
 
|-
|{{amd|Socket F|Socket Fr2|l=package}}||2007||LGA||1207||NPT 0Fh, 10h||2 × 72 bit DDR2||3 × 16 HT1||{{tchk|no}}||-||||[[File:LGA-1207 F.svg|x50px]]
+
|{{amd|Socket F|l=package}}||2006||LGA||1207||0Fh, 10h||2 × 72 bit DDR2||3 × 16 HT1||||||||[[File:LGA-1207 F.svg|x50px]]
 
|-
 
|-
|{{amd|Socket F|Socket Fr5|l=package}}||2008||LGA||1207||NPT 0Fh, 10h||2 × 72 bit DDR2||3 × 16 HT1/3||{{tchk|no}}||-||||[[File:LGA-1207 F.svg|x50px]]
+
|{{amd|Socket F|Socket Fr2|l=package}}||2007||LGA||1207||0Fh, 10h||2 × 72 bit DDR2||3 × 16 HT1||||||||[[File:LGA-1207 F.svg|x50px]]
 
|-
 
|-
|{{amd|Socket F|Socket Fr6|l=package}}||2009||LGA||1207||10h||2 × 72 bit DDR2||3 × 16 HT3||{{tchk|no}}||-||||[[File:LGA-1207 F.svg|x50px]]
+
|{{amd|Socket F|Socket Fr5|l=package}}||2008||LGA||1207||0Fh, 10h||2 × 72 bit DDR2||3 × 16 HT1/3||||||||[[File:LGA-1207 F.svg|x50px]]
 
|-
 
|-
|{{amd|Socket C32|l=package}}||2010||LGA||1207||10h, 15h||2 × 72 bit DDR3||3 × 16 HT3||{{tchk|no}}||-||||[[File:LGA-1207 C32.svg|x50px]]
+
|{{amd|Socket F|Socket Fr6|l=package}}||2009||LGA||1207||10h||2 × 72 bit DDR2||3 × 16 HT3||||||||[[File:LGA-1207 F.svg|x50px]]
 
|-
 
|-
|{{amd|Socket G34|l=package}}||2010||LGA||1944||10h, 15h||4 × 72 bit DDR3||3 × 16 + 2 × 8 HT3||{{tchk|no}}||-||||[[File:LGA-1944.svg|x50px]]
+
|{{amd|Socket C32|l=package}}||2010||LGA||1207||10h, 15h||2 × 72 bit DDR3||3 × 16 HT3||||||||[[File:LGA-1207 C32.svg|x50px]]
 
|-
 
|-
|{{amd|Socket SP3|l=package}}||2017||LGA||4094||17h, 19h||8 × 72 bit DDR4||8 × 16 PCIe3/4||{{tchk|no}}||integrated||||[[File:FCLGA-4094.svg|x50px]]
+
|{{amd|Socket G34|l=package}}||2010||LGA||1944||10h, 15h||4 × 72 bit DDR3||3 × 16 + 2 × 8 HT3||||||||[[File:LGA-1944.svg|x50px]]
 
|-
 
|-
|{{amd|Socket SP5|l=package}}||2022||LGA||6096||19h||12 × 80 bit DDR5||8 × 16 PCIe5||{{tchk|no}}||integrated||||[[File:LGA-6096.svg|x50px]]
+
|{{amd|Socket SP3|l=package}}||2017||LGA||4094||17h, 19h||8 × 72 bit DDR4||8 × 16 PCIe3||||integrated||||[[File:FCLGA-4094.svg|x50px]]
 
|}
 
|}
<references/>
 
  
== Mobile Sockets (mainstream) ==
+
== Mobile sockets (mainstream) ==
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
|-
 
|-
|{{amd|Super Socket 7|l=package}}||1998||PGA||321||5||-||FSB||{{tchk|no}}||-||||[[File:CPGA-321.svg|x50px]]
+
|{{amd|Super Socket 7|l=package}}||1998||PGA||321||||||FSB||||||||[[File:CPGA-321.svg|x50px]]
 
|-
 
|-
|{{amd|Socket A|l=package}}||2000||PGA||462||6||-||FSB||{{tchk|no}}||-||||[[File:OPGA-453.svg|x50px]] [[File:CPGA-453.svg|x50px]]
+
|{{amd|Socket A|l=package}}||2000||PGA||462||||||FSB||||||||
 
|-
 
|-
|{{amd|Socket 563|l=package}}||2003||PGA||563||6||-||FSB||{{tchk|no}}||-||||[[File:OPGA-563.svg|x50px]]
+
|{{amd|Socket 563|l=package}}||||PGA||563||||||FSB||||||||
 
|-
 
|-
|{{amd|Socket 754|l=package}}||2003||PGA||754||0Fh||72 bit DDR||16 HT1||{{tchk|no}}||-||||[[File:OPGA-754.svg|x50px]]
+
|{{amd|Socket 754|l=package}}||2003||PGA||754||||72 bit DDR||HT1||||||||[[File:OPGA-754.svg|x50px]]
 
|-
 
|-
|{{amd|Socket S1g1|l=package}}||2006||PGA||638||NPT 0Fh||144 bit DDR2||16 HT1||{{tchk|no}}||-||||[[File:OPGA-638.svg|x50px]]
+
|{{amd|Socket S1g1|l=package}}||2006||PGA||638||0Fh||144 bit DDR2||HT1||||||||[[File:OPGA-638.svg|x50px]]
 
|-
 
|-
|{{amd|Socket S1g2|l=package}}||2008||PGA||638||11h||2 × 64 bit DDR2||16 HT3||{{tchk|no}}||-||||[[File:OPGA-638.svg|x50px]]
+
|{{amd|Socket S1g2|l=package}}||2008||PGA||638||11h||2 × 64 bit DDR2||HT3||||||||[[File:OPGA-638.svg|x50px]]
 
|-
 
|-
|{{amd|Socket S1g3|l=package}}||2009||PGA||638||10h||2 × 64 bit DDR2||16 HT3||{{tchk|no}}||-||||[[File:OPGA-638.svg|x50px]]
+
|{{amd|Socket S1g3|l=package}}||2009||PGA||638||10h||2 × 64 bit DDR2||HT3||||||||[[File:OPGA-638.svg|x50px]]
 
|-
 
|-
|{{amd|ASB1|Package ASB1|l=package}}||2009||BGA||812||NPT 0Fh||144 bit DDR2||16 HT1||{{tchk|no}}||-||||[[File:BGA-812.svg|x50px]]
+
|{{amd|ASB1|Package ASB1|l=package}}||2009||BGA||812||0Fh||144 bit DDR2||HT1||||||||[[File:BGA-812.svg|x50px]]
 
|-
 
|-
|{{amd|Socket S1g4|l=package}}||2010||PGA||638||10h||2 × 64 bit DDR3||16 HT3||{{tchk|no}}||-||||[[File:OPGA-638.svg|x50px]]
+
|{{amd|Socket S1g4|l=package}}||2010||PGA||638||10h||2 × 64 bit DDR3||HT3||||||||[[File:OPGA-638.svg|x50px]]
 
|-
 
|-
|{{amd|ASB2|Package ASB2|l=package}}||2010||BGA||812||10h||2 × 72 bit DDR3||16 HT3||{{tchk|no}}||-||||[[File:BGA-812.svg|x50px]]
+
|{{amd|ASB2|Package ASB2|l=package}}||2010||BGA||812||10h||2 × 72 bit DDR3||HT3||||||||[[File:BGA-812.svg|x50px]]
 
|-
 
|-
|{{amd|Socket FS1|l=package}}||2011||PGA||722||12h||2 × 64 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:OPGA-722.svg|x50px]]
+
|{{amd|Socket FS1|l=package}}||2011||PGA||722||12h||2 × 64 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:OPGA-722.svg|x50px]]
 
|-
 
|-
|{{amd|Socket FS1r2|l=package}}||2012||PGA||722||15h||2 × 64 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:OPGA-722.svg|x50px]]
+
|{{amd|Socket FS1r2|l=package}}||2012||PGA||722||15h||2 × 64 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:OPGA-722.svg|x50px]]
 
|-
 
|-
|{{amd|FP2|Package FP2|l=package}}||2012||BGA||827||15h||2 × 64 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-827.svg|x50px]]
+
|{{amd|FP2|Package FP2|l=package}}||2012||BGA||827||15h||2 × 64 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:BGA-827.svg|x50px]]
 
|-
 
|-
|{{amd|FP3|Package FP3|l=package}}||2014||BGA||854||15h||2 × 72 bit DDR3||16 + 8 PCIe2/3||{{tchk|yes}}||4 PCIe2||||[[File:BGA-854.svg|x50px]]
+
|{{amd|FP3|Package FP3|l=package}}||2014||BGA||854||15h||2 × 72 bit DDR3||16 + 8 PCIe2/3||||4 PCIe2||||[[File:BGA-854.svg|x50px]]
 
|-
 
|-
|{{amd|FP4|Package FP4|l=package}}||2015||BGA||968||15h, 16h||2 × 72 bit DDR3/4||8 + 4 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-968.svg|x50px]]
+
|{{amd|FP4|Package FP4|l=package}}||2015||BGA||968||15h, 16h||2 × 72 bit DDR3/4||8 + 4 PCIe3||||integrated||||[[File:BGA-968.svg|x50px]]
 
|-
 
|-
|{{amd|FP5|Package FP5|l=package}}||2018||BGA||1140||17h||2 × 72 bit DDR4||8 + 8 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-1140.svg|x50px]]
+
|{{amd|FP5|Package FP5|l=package}}||2018||BGA||1140||17h||2 × 72 bit DDR4||8 + 8 PCIe3||✓||integrated||||[[File:BGA-1140.svg|x50px]]
 +
|-
 +
|{{amd|FP6|Package FP6|l=package}}||2020||BGA||1140||17h||2 × 72 bit DDR4<br/>4 × 32 bit LPDDR4x||8 + 12 PCIe3||✓||integrated||||[[File:BGA-1140.svg|x50px]]
 
|-
 
|-
|{{amd|FP6|Package FP6|l=package}}||2020||BGA||1140||17h||2 × 72 bit DDR4<br/>4 × 32 bit LPDDR4x||8 + 12 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-1140.svg|x50px]]
 
 
|}
 
|}
<references/>
 
  
== Mobile Sockets (ultrathin, tablet) ==
+
== Mobile sockets (ultrathin, tablet) ==
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
|-
 
|-
|{{amd|FT1|Package FT1|l=package}}||2011||BGA||413||14h||64 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-413.svg|x50px]]
+
|{{amd|FT1|Package FT1|l=package}}||2011||BGA||413||14h||64 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-413.svg|x50px]]
 
|-
 
|-
|{{amd|FT3|Package FT3|l=package}}||2013||BGA||769||16h||72 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-769.svg|x50px]]
+
|{{amd|FT3|Package FT3|l=package}}||2013||BGA||769||16h||72 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-769.svg|x50px]]
 
|-
 
|-
|{{amd|FT3b|Package FT3b|l=package}}||2014||BGA||769||16h||72 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-769.svg|x50px]]
+
|{{amd|FT3b|Package FT3b|l=package}}||2014||BGA||769||16h||72 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-769.svg|x50px]]
 
|-
 
|-
|{{amd|FT4|Package FT4|l=package}}||2016||BGA||769||15h||64 bit DDR3/4||8 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-769.svg|x50px]]
+
|{{amd|FT4|Package FT4|l=package}}||2016||BGA||769||15h||64 bit DDR3/4||8 PCIe3||||integrated||||[[File:BGA-769.svg|x50px]]
 
|-
 
|-
|{{amd|FT5|Package FT5|l=package}}||2020||BGA||||17h||2 × ?? bit DDR4||8 PCIe3||{{tchk|yes}}||integrated||||
+
|{{amd|FT5|Package FT5|l=package}}||2020||BGA||||17h||2 × ?? bit DDR4||8 PCIe3||||integrated||||
 
|}
 
|}
<references/>
 
  
== Embedded Sockets ==
+
== Embedded sockets ==
 
{| class="wikitable sortable"
 
{| class="wikitable sortable"
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O lanes!!APU!!FCH!!Notes!!Package
 
|-
 
|-
|{{amd|ASB1|Package ASB1|l=package}}||2009||BGA||812||NPT 0Fh||144 bit DDR2||16 HT1||{{tchk|no}}||-||||[[File:BGA-812.svg|x50px]]
+
|{{amd|ASB1|Package ASB1|l=package}}||2009||BGA||812||0Fh||144 bit DDR2||HT1||||||||[[File:BGA-812.svg|x50px]]
 
|-
 
|-
|{{amd|ASB2|Package ASB2|l=package}}||2010||BGA||812||10h||2 × 72 bit DDR3||16 HT3||{{tchk|no}}||-||||[[File:BGA-812.svg|x50px]]
+
|{{amd|ASB2|Package ASB2|l=package}}||2010||BGA||812||10h||2 × 72 bit DDR3||HT3||||||||[[File:BGA-812.svg|x50px]]
 
|-
 
|-
|{{amd|FT1|Package FT1|l=package}}||2011||BGA||413||14h||64 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-413.svg|x50px]]
+
|{{amd|FT1|Package FT1|l=package}}||2011||BGA||413||14h||64 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-413.svg|x50px]]
 
|-
 
|-
|{{amd|FP2|Package FP2|l=package}}||2012||BGA||827||15h||2 × 64 bit DDR3||16 + 4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-827.svg|x50px]]
+
|{{amd|FP2|Package FP2|l=package}}||2012||BGA||827||15h||2 × 64 bit DDR3||16 + 4 PCIe2||||4 PCIe2||||[[File:BGA-827.svg|x50px]]
 
|-
 
|-
|{{amd|FT3|Package FT3|l=package}}||2013||BGA||769||16h||72 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-769.svg|x50px]]
+
|{{amd|FT3|Package FT3|l=package}}||2013||BGA||769||16h||72 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-769.svg|x50px]]
 
|-
 
|-
|{{amd|FP3|Package FP3|l=package}}||2014||BGA||854||15h||2 × 72 bit DDR3||16 + 8 PCIe2/3||{{tchk|yes}}||4 PCIe2||||[[File:BGA-854.svg|x50px]]
+
|{{amd|FP3|Package FP3|l=package}}||2014||BGA||854||15h||2 × 72 bit DDR3||16 + 8 PCIe2/3||||4 PCIe2||||[[File:BGA-854.svg|x50px]]
 
|-
 
|-
|{{amd|SP1|Package SP1|l=package}}||2014||BGA||1021||||2 × 72 bit DDR3/4||8 PCIe3||{{tchk|no}}||integrated||||
+
|{{amd|SP1|Package SP1|l=package}}||2014||BGA||1021||||2 × 72 bit DDR3/4||8 PCIe3||||integrated||||
 
|-
 
|-
|{{amd|FT3b|Package FT3b|l=package}}||2014||BGA||769||16h||72 bit DDR3||4 PCIe2||{{tchk|yes}}||4 PCIe2||||[[File:BGA-769.svg|x50px]]
+
|{{amd|FT3b|Package FT3b|l=package}}||2014||BGA||769||16h||72 bit DDR3||4 PCIe2||||4 PCIe2||||[[File:BGA-769.svg|x50px]]
 
|-
 
|-
|{{amd|FP4|Package FP4|l=package}}||2015||BGA||968||15h, 16h||2 × 72 bit DDR3/4||8 + 4 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-968.svg|x50px]]
+
|{{amd|FP4|Package FP4|l=package}}||2015||BGA||968||15h, 16h||2 × 72 bit DDR3/4||8 + 4 PCIe3||||integrated||||[[File:BGA-968.svg|x50px]]
 
|-
 
|-
|{{amd|FP5|Package FP5|l=package}}||2018||BGA||1140||17h||2 × 72 bit DDR4||8 + 8 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-1140.svg|x50px]]
+
|{{amd|FP5|Package FP5|l=package}}||2018||BGA||1140||17h||2 × 72 bit DDR4||8 + 8 PCIe3||||integrated||||[[File:BGA-1140.svg|x50px]]
 
|-
 
|-
|{{amd|Socket SP3|l=package}}||2017||LGA||4094||17h||8 × 72 bit DDR4||8 × 16 PCIe3||{{tchk|no}}||integrated
+
|{{amd|SP4|Package SP4|l=package}}||2018||BGA||||17h||4 × 72 bit DDR3||4 × 16 PCIe3||||||||
|<ref>Embedded versions of EPYC 7001 & 7002 processors, hence Family 17h only.</ref>
 
|[[File:FCLGA-4094.svg|x50px]]
 
 
|-
 
|-
|{{amd|SP4|Package SP4|l=package}}||2018||BGA||||17h||4 × 72 bit DDR4||4 × 16 PCIe3||{{tchk|no}}||integrated||||
+
|{{amd|SP4r2|Package SP4r2|l=package}}||2018||BGA||||17h||2 × 72 bit DDR3||2 × 16 PCIe3||||||||
 
|-
 
|-
|{{amd|SP4r2|Package SP4r2|l=package}}||2018||BGA||||17h||2 × 72 bit DDR4||2 × 16 PCIe3||{{tchk|no}}||integrated||||
+
|{{amd|FP6|Package FP6|l=package}}||2020||BGA||1140||17h||2 × 72 bit DDR4<br/>4 × 32 bit LPDDR4x||8 + 12 PCIe3||||integrated||||[[File:BGA-1140.svg|x50px]]
|-
 
|{{amd|FP6|Package FP6|l=package}}||2020||BGA||1140||17h||2 × 72 bit DDR4<br/>4 × 32 bit LPDDR4x||8 + 12 PCIe3||{{tchk|yes}}||integrated||||[[File:BGA-1140.svg|x50px]]
 
 
|}
 
|}
<references/>
 
  
== Game Consoles ==
+
[[Category:amd]]
{| class="wikitable sortable"
 
!Name!!Year!!Type!!Pins!!Fam.!!MC!!I/O!!APU!!FCH!!Notes
 
|-
 
|{{wp|Xbox_One|Xbox One X}} {{amd|BGA-2409|l=pack}}||2017||BGA||2409||16h||12 × 32 bit GDDR5||8 PCIe3||{{tchk|yes}}||||[[File:BGA-2409.svg|x50px]]
 
|-
 
|[https://en.wikipedia.org/wiki/Xbox_Series_X_and_Series_S Xbox Series X/S]||2020||BGA||2963||17h||20 × 16 bit GDDR6||8 PCIe4||{{tchk|yes}}||||Lidless package with stiffener frame, 52.5&nbsp;mm × 52.5&nbsp;mm, 0.8+&nbsp;mm multi-pitch<ref name="ISSCC2021-XSX"/><ref name="Paternoster2021"/>
 
|}
 
<references>
 
<ref name="ISSCC2021-XSX">{{cite presentation|presenters=Paternoster, Paul|authors=Maki, Andy;Hernandez, Andres;Grossman, Mark;Lau, Michael;Sutherland, David;Mathad, Aditya|title=XBOX SERIES X SoC – A Next Generation Gaming Console|slides=File:ISSCC2021 3.1 XSX Paternoster slides.pdf|date=2021-02-15|conference=IEEE ISSCC 2021|session=3.1}}</ref>
 
<ref name="Paternoster2021">{{cite article|authors=Paternoster, Paul;Maki, Andy;Hernandez, Andres;Grossman, Mark;Lau, Michael;Sutherland, David;Mathad, Aditya|title=XBOX Series X: A Next-Generation Gaming Console SoC|date=2021-02|conference=Proceedings of IEEE ISSCC 2021|pages=46-48|doi=10.1109/ISSCC42613.2021.9366057}}</ref>
 
</references>
 
 
 
== Packages to Scale ==
 
[[File:BGA-413.svg|76px|FT1 19 mm × 19 mm (BGA)]]
 
[[File:BGA-769.svg|96px|FT3/FT3b/FT4 24.5 mm × 24.5 mm (BGA)]]
 
[[File:BGA-812.svg|106px|ASB1/ASB2 27 mm × 27 mm (BGA)]]
 
[[File:BGA-827.svg|121px|FP2 31 mm × 27 mm (BGA)]]
 
[[File:BGA-854.svg|113px|FP3 29 mm × 32 mm (BGA)]]
 
[[File:BGA-968.svg|144px|FP4 37 mm × 29 mm (BGA)]]
 
[[File:BGA-1140.svg|136px|FP5/FP6 35 mm × 25 mm (BGA)]]
 
[[File:OPGA-563.svg|129px|Socket 563 33 mm × 33 mm]]
 
[[File:OPGA-638.svg|136px|S1 35 mm × 35 mm]]
 
[[File:OPGA-722.svg|136px|FS1/FS1r2 35 mm × 35 mm]]
 
[[File:OPGA-721.svg|136px|AM1 35 mm × 35 mm]]
 
[[File:OPGA-754.svg|155px|Socket 754 40 mm × 40 mm]]
 
[[File:OPGA-940 S940.svg|155px|Socket 940 40 mm × 40 mm]]
 
[[File:OPGA-939.svg|155px|Socket 939 40 mm × 40 mm]]
 
[[File:LGA-1207 F.svg|155px|Socket F 40 mm × 40 mm]]
 
[[File:LGA-1207 C32.svg|155px|C32 40 mm × 40 mm]]
 
[[File:OPGA-940 AM2.svg|155px|AM2/AM2+ 40 mm × 40 mm]]
 
[[File:OPGA-905.svg|155px|FM1 40 mm × 40 mm]]
 
[[File:OPGA-938.svg|155px|AM3 40 mm × 40 mm]]
 
[[File:OPGA-941.svg|155px|AM3+ 40 mm × 40 mm]]
 
[[File:OPGA-904.svg|155px|FM2 40 mm × 40 mm]]
 
[[File:OPGA-906.svg|155px|FM2+ 40 mm × 40 mm]]
 
[[File:socket_am4.svg|151px|AM4 40 mm × 40 mm]]
 
[[File:LGA-1718.svg|155px|AM5 40 mm × 40 mm]]
 
<span style="width:170px;height:170px;line-height:170px;border:1px solid #000;display:inline-block;text-align:center" title="SP4/SP4r2 45 mm × 45 mm">SP4/SP4r2</span>
 
[[File:CPGA-321.svg|191px|Socket 7/Super 7 49.5 mm × 49.5 mm]]
 
[[File:OPGA-453.svg|191px|Socket A 49.5 mm × 49.5 mm]]
 
[[File:BGA-2409.svg|193px|XBox One X BGA-2409 50 mm × 50 mm]]
 
<span style="width:198px;height:198px;line-height:198px;border:1px solid #000;display:inline-block;text-align:center" title="XBox Series X/S 52.5 mm × 52.5 mm">XBox Series X/S</span>
 
[[File:LGA-1944.svg|231px|G34 60 mm × 42.5 mm]]
 
[[File:FCLGA-4094.svg|289px|SP3/TR4/sTRX4/sWRX8 75.4 mm × 58.5 mm]]
 
[[File:LGA-6096.svg|289px|SP5 75.4 mm × 72.0 mm]]
 

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