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** '''[[DSP accelerator]]''' - accelerators that performs algorithms used for the processing of digial signals
 
** '''[[DSP accelerator]]''' - accelerators that performs algorithms used for the processing of digial signals
 
* '''[[Programmable accelerator]]''' - accelerators that come in the form of an FPGA and can implement any function necessary
 
* '''[[Programmable accelerator]]''' - accelerators that come in the form of an FPGA and can implement any function necessary
 
== Performance considerations ==
 
A critical parameter when performing performance analysis is speedup which consts of the accelerator's execution time, data transfer time, and sync time with host processor.
 
 
:<math>t_\text{accelerator} = t_\text{input} + t_\text{execution} + t_\text{output}</math>
 
 
Where input and output time are the bus transactions including the data transfer and the setup time.
 
 
:<math>S = t_\text{CPU} - t_\text{accelerator}</math>
 
  
 
[[Category:hardware acceleration]]
 
[[Category:hardware acceleration]]

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