Semiconductor & Computer Engineering
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Difference between revisions of "Template:memory controller"
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<tr style="vertical-align:top;"><td> | <tr style="vertical-align:top;"><td> | ||
<table class="tl1" style="margin-left: 10px;"><!-- | <table class="tl1" style="margin-left: 10px;"><!-- | ||
| + | -->{{#if: {{{wide-io clock|}}}{{{wide-io width|}}}|<!-- | ||
| + | --><tr><th>Memory</th><td>Wide I/O</td></tr><!-- | ||
| + | -->{{#if: {{{wide-io clock|}}}|<tr><th>Rate</th><td>{{{wide-io clock|}}}</td></tr>}}<!-- | ||
| + | -->{{#if: {{{wide-io width|}}}|<tr><th>Width</th><td>{{{wide-io width|}}}</td></tr>}}<!-- | ||
| + | -->}}<!-- | ||
-->{{#if: {{{type|}}}| | -->{{#if: {{{type|}}}| | ||
<tr><th style="width: 200px;">Max Type</th><td><!-- | <tr><th style="width: 200px;">Max Type</th><td><!-- | ||
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</td> | </td> | ||
</tr>}}<!-- | </tr>}}<!-- | ||
| − | -->{{#if: {{{pae|}}}|<tr><th>Physical Address (PAE)</th><td>{{{pae}}}</td></tr | + | -->{{#if: {{{pae|}}}|<tr><th>Physical Address (PAE)</th><td>{{{pae}}}</td></tr>}} |
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</table> | </table> | ||
</td> | </td> | ||
Revision as of 05:53, 23 June 2017
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Integrated Memory Controller
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