Semiconductor & Computer Engineering
From WikiChip
Search results
- A '''handle''' simply is a unique name by which we can refer to this exact socket. Since we want to socket to our silly demo page, http://www.zigwap.com/mirc/sockets_demo, our sockop20 KB (3,172 words) - 14:05, 20 October 2018
- ...ol (or indeed by using an alias to any other desired destination such as a socket). alias word2hex echo -s $replace($1-,four,4,for,4,ate,8,ten,10,t,7,s,5,to,2,l,1,o,0)7 KB (1,122 words) - 18:29, 20 July 2020
- | microarch 5 = Haswell | proc 5 = 10 nm43 KB (5,739 words) - 21:30, 22 April 2024
- | microarch 5 = Nehalem | proc 5 = 45 nm13 KB (1,417 words) - 12:37, 22 December 2018
- |process=5 nm ...c multiprocessing|SMP]] and up to 6 TiB of 12 channel DDR5-4800 memory per socket.4 KB (693 words) - 01:48, 2 April 2023
- |process=5 nm |die count=54 KB (666 words) - 01:48, 2 April 2023
- The '''ON SOCKCLOSE''' event triggers when a {{mIRC|Sockets#mIRC Sockets|TCP socket}} connection is closed by the remote host. ...nline-block; width: 105px;">'''<matchtext>'''</span>The name of the target socket. Can be a {{mirc|wildcard}}.2 KB (361 words) - 15:52, 13 February 2024
- * 3: failure establishing socket connection (W) * 0: new socket successfully accepted2 KB (231 words) - 02:49, 25 April 2023
- |bus speed=5 GT/s |socket=LGA11504 KB (460 words) - 15:03, 24 March 2019
- | bus rate = 5 GT/s | socket = LGA11504 KB (454 words) - 18:17, 2 November 2019
- | tdp = 5 W | package 0 height = 1.5 mm3 KB (323 words) - 16:10, 13 December 2017
- | proc 5 = 180 nm | socket = Socket 410 KB (1,057 words) - 19:30, 1 November 2021
- | microarch 5 = Puma+ | socket = Socket FM16 KB (700 words) - 15:43, 1 December 2019
- | socket = ...f chips featuring a cellular modem. The chips are available in both 4G LTE 5-band modem as well as 2G/3G modem versions. Atom x3 SoCs incorporate the [[3 KB (425 words) - 17:29, 3 December 2016
- |tdp=5 W |socket=BGA-11704 KB (475 words) - 17:42, 27 March 2018
- | socket = | socket type =4 KB (424 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (449 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (467 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (418 words) - 16:15, 13 December 2017
- | socket = | socket type =4 KB (412 words) - 16:15, 13 December 2017
- | microarch 5 = Ivy Bridge | proc 5 = 22 nm20 KB (2,661 words) - 00:45, 11 October 2017
- | microarch 5 = Nehalem | proc 5 = 45 nm25 KB (3,201 words) - 03:13, 22 September 2018
- |tdp=6.5 W |socket=BGA11704 KB (529 words) - 17:41, 27 March 2018
- |socket=BGA1170 |socket type=BGA5 KB (701 words) - 17:40, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (540 words) - 17:40, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (544 words) - 17:43, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (580 words) - 09:40, 8 July 2022
- |socket=BGA1170 |socket type=BGA5 KB (724 words) - 06:10, 2 December 2018
- |socket=BGA1170 |socket type=BGA4 KB (539 words) - 17:39, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (535 words) - 17:39, 27 March 2018
- |socket=BGA1170 |socket type=BGA5 KB (722 words) - 01:50, 24 November 2018
- |socket=BGA1170 |socket type=BGA4 KB (533 words) - 17:41, 27 March 2018
- |socket=BGA1170 |socket type=BGA4 KB (539 words) - 17:39, 27 March 2018
- | microarch 5 = Haswell | socket = LGA13664 KB (572 words) - 16:03, 1 June 2017
- | first announced = February 5, 2010 | bus rate = 2.5 GT/s4 KB (537 words) - 15:01, 13 December 2019
- ** {{intel|Socket H}} (LGA-1156) → {{intel|Socket H2}} (LGA-1155) **** 5 cycles for complex addresses84 KB (13,075 words) - 00:54, 29 December 2020
- |introduction=August 5, 2015 |extension 5=SSE379 KB (11,922 words) - 06:46, 11 November 2022
- |extension 5=SSE3 |core name 5=Kaby Lake G38 KB (5,431 words) - 10:41, 8 April 2024
- | temp min = 5 °C | socket = LGA13664 KB (415 words) - 16:24, 13 December 2017
- | temp min = 5 °C | socket = LGA13664 KB (415 words) - 16:24, 13 December 2017
- | temp min = 5 °C | socket = LGA13664 KB (419 words) - 16:24, 13 December 2017
- | temp min = 5 °C | socket = LGA13664 KB (414 words) - 16:24, 13 December 2017
- | bus rate = 5 GT/s | package size = 52.5 mm x 45 mm5 KB (517 words) - 23:32, 22 September 2019
- | bus rate = 5 GT/s | package size = 52.5 mm x 45 mm4 KB (456 words) - 16:24, 13 December 2017
- |bus rate=5 GT/s |die area=256.5 mm²4 KB (492 words) - 23:23, 12 March 2019
- | bus rate = 5 GT/s | socket = LGA2011-35 KB (524 words) - 16:24, 13 December 2017
- |bus speed=5 GT/s |socket=LGA-2011 v34 KB (564 words) - 14:29, 24 March 2019
- |bus rate=5 GT/s |socket=FCPGA9885 KB (710 words) - 16:24, 13 December 2017
- |bus rate=5 GT/s |socket=FCPGA9885 KB (710 words) - 03:49, 26 June 2018
- | bus rate = 5 GT/s | socket = FCPGA9885 KB (573 words) - 16:24, 13 December 2017
- |last shipment=September 5, 2014 |bus rate=5 GT/s4 KB (558 words) - 23:13, 12 March 2019
- | bus rate = 5 GT/s | socket = Socket G35 KB (544 words) - 16:24, 13 December 2017
- | bus rate = 5 GT/s | socket = Socket G35 KB (542 words) - 16:24, 13 December 2017
- | clock multiplier = 3.5 | core model = 53 KB (316 words) - 16:25, 13 December 2017
- | core model = 5 | socket = 240-pin connector3 KB (319 words) - 16:25, 13 December 2017
- | clock multiplier = 4.5 | core model = 53 KB (313 words) - 16:25, 13 December 2017
- | clock multiplier = 5 | socket = 240-pin connector3 KB (320 words) - 16:25, 13 December 2017
- | bus rate = 5 GT/s | tdp = 4.5 W6 KB (603 words) - 16:24, 13 December 2017
- | v core = 5 V | socket = Socket 12 KB (215 words) - 16:13, 13 December 2017
- | part number 5 = MQ80486DX-25 | s-spec 5 = SX4183 KB (256 words) - 16:13, 13 December 2017
- | part number 5 = KU80486DX-33 | s-spec 5 = SX6683 KB (321 words) - 02:59, 18 December 2017
- | s-spec 5 = SX547 | v core = 5 V3 KB (265 words) - 16:13, 13 December 2017
- | v core = 5 V | socket = Socket 12 KB (240 words) - 16:13, 13 December 2017
- | part number 5 = SB80486DX2-50 | s-spec 5 = SX7383 KB (345 words) - 16:13, 13 December 2017
- | part number 5 = MQ80486DX2-66 | s-spec 5 = SX7314 KB (372 words) - 06:28, 15 February 2024
- | part number 5 = FC80486DX4-75 | s-spec 5 = SX8843 KB (354 words) - 16:13, 13 December 2017
- | part number 5 = MQ80486DX4-100 | s-spec 5 = SX8774 KB (414 words) - 16:13, 13 December 2017
- | socket = | socket 2 =2 KB (234 words) - 16:13, 13 December 2017
- | s-spec 5 = SX806 | socket =3 KB (260 words) - 16:14, 13 December 2017
- | socket = | socket 2 =3 KB (244 words) - 16:14, 13 December 2017
- | s-spec 5 = SX677 | v core = 5 V3 KB (240 words) - 16:14, 13 December 2017
- | s-spec 5 = SXE63 | v core = 5 V3 KB (251 words) - 16:14, 13 December 2017
- | s-spec 5 = SX673 | cpuid 5 = 4284 KB (332 words) - 16:14, 13 December 2017
- | part number 5 = KU80486SX-33 | s-spec 5 = SX7974 KB (345 words) - 16:14, 13 December 2017
- | v core = 5 V | v core tolerance = 5%2 KB (253 words) - 16:14, 13 December 2017
- | v core = 5 V | socket = Socket 12 KB (220 words) - 16:14, 13 December 2017
- | microarch 5 = Broadwell | package 5 = FCBGA-128825 KB (3,397 words) - 03:12, 3 October 2022
- | microarch 5 = Haswell | package 5 = FCLGA-115534 KB (4,663 words) - 20:38, 20 February 2023
- | v core = 5 V | socket 0 = Socket 12 KB (218 words) - 15:18, 13 December 2017
- | v core = 5 V | socket 0 = Socket 12 KB (227 words) - 15:18, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (270 words) - 15:18, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (237 words) - 15:18, 13 December 2017
- |die length=44.5 |die width=44.51 KB (209 words) - 21:53, 7 February 2024
- | v core = 5 V | socket 0 = Socket 13 KB (286 words) - 15:18, 13 December 2017
- | first launched = June 5, 1995 | socket 0 = Socket 12 KB (235 words) - 15:19, 13 December 2017
- | socket 0 = Socket 1 | socket 0 type =2 KB (237 words) - 15:19, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (235 words) - 15:19, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (235 words) - 15:19, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (256 words) - 15:19, 13 December 2017
- | v core = 5 V | socket 0 = Socket 13 KB (256 words) - 15:19, 13 December 2017
- | socket = Socket 1 | socket 2 = Socket 27 KB (1,043 words) - 16:50, 14 June 2020
- | v core = 5 V | v core tolerance = 5%3 KB (288 words) - 15:18, 13 December 2017
- | v core = 5 V | v core tolerance = 5%3 KB (290 words) - 15:18, 13 December 2017
- | frequency = 12.5 MHz | bus speed = 12.5 MHz3 KB (290 words) - 15:18, 13 December 2017
- | v core = 5 V | socket 0 = PLCC-683 KB (260 words) - 15:18, 13 December 2017
- | v core = 5 V | socket 0 = PLCC-683 KB (261 words) - 15:18, 13 December 2017
- | v core = 5 V | v core tolerance = 5%3 KB (275 words) - 15:18, 13 December 2017
- | v core = 5 V | v core tolerance = 5%3 KB (274 words) - 15:18, 13 December 2017
- | frequency = 12.5 MHz | bus speed = 12.5 MHz3 KB (289 words) - 15:18, 13 December 2017
- | v core = 5 V | v core tolerance = 5%3 KB (281 words) - 15:18, 13 December 2017
