...mips|MIPS64}} ISAs that can be queried to identify the [[MIPS]] CPU. The [[Processor ID]] should be unique for each instruction set or CPU control register chan | 0x030000 || [[Alchemy]], [[AMD]], [[RMI]] ({{alchemy|Alchemy}} processors)

...et forces, particularly AMD's introduction of {{amd|Zen|l=arch}} and the {{amd|Ryzen}} family. ...cture by introducing two additional [[physical cores]] into its mainstream processor die. Those two cores also come with up to 2 MiB of LLC slice per core (for

{{amd title|Zen|arch}} |designer=AMD

{{amd title|Zen 2|arch}} |designer=AMD

...amd|Ryzen 7}} processor family for high-end performance [[x86]] based on {{amd|Zen|l=arch}} * March 2: [[AMD]] launches the {{amd|Ryzen 7}} family

{{amd title|EPYC 7351P}} |designer=AMD

{{amd title|EPYC 7401P}} |designer=AMD

{{amd title|EPYC 7551P}} |designer=AMD

{{amd title|EPYC 7601}} |designer=AMD

{{amd title|EPYC 7551}} |designer=AMD

{{amd title|EPYC 7501}} |designer=AMD

{{amd title|EPYC 7451}} |designer=AMD

{{amd title|EPYC 7401}} |designer=AMD

{{amd title|EPYC 7351}} |designer=AMD

{{amd title|EPYC 7301}} |designer=AMD

{{amd title|EPYC 7281}} |designer=AMD

{{amd title|EPYC 7251}} |designer=AMD

{{amd title|Ryzen 7 PRO 1700}} |designer=AMD

{{amd title|Ryzen 7 PRO 1700X}} |designer=AMD

{{amd title|Ryzen 5 PRO 1600}} |designer=AMD

{{amd title|Ryzen 3 PRO 1300}} |designer=AMD

{{amd title|Ryzen 3 PRO 1200}} |designer=AMD

* {{x86|XSAVEC|<code>XSAVEC</code>}} - Save processor extended states with compaction to memory * {{x86|XSAVES|<code>XSAVES</code>}} - Save processor supervisor-mode extended states to memory.

...cy of 1.1 GHz. Additionally, this processor also incorporates a discrete {{amd|Radeon RX Vega M GL}} GPU operating at up to 1.011 GHz with its own 4 GiB o {{unknown features}}

...cy of 1.1 GHz. Additionally, this processor also incorporates a discrete {{amd|Radeon RX Vega M GH}} GPU operating at up to 1.19 GHz with its own 4 GiB of {{unknown features}}

...cy of 1.1 GHz. Additionally, this processor also incorporates a discrete {{amd|Radeon RX Vega M GL}} GPU operating at up to 1.011 GHz with its own 4 GiB o {{unknown features}}

...cy of 1.1 GHz. Additionally, this processor also incorporates a discrete {{amd|Radeon RX Vega M GL}} GPU operating at up to 1.011 GHz with its own 4 GiB o {{unknown features}}

{{amd title|Ryzen Embedded V1807B}} |designer=AMD

{{amd title|Ryzen Embedded V1756B}} |designer=AMD

{{amd title|Ryzen Embedded V1605B}} |designer=AMD

{{amd title|Ryzen Embedded V1202B}} |designer=AMD

{{amd title|Ryzen Embedded}} | title = AMD Ryzen Embedded

{{amd title|CPUID}}{{x86 isa main}} ...x86 processors broken down by processor family, [[microarchitecture]], and processor design codename.

{{amd title|Ryzen 7 PRO 2700}} |designer=AMD

{{amd title|Ryzen 7 PRO 2700X}} |designer=AMD

{{amd title|Ryzen 5 PRO 2600}} |designer=AMD

{{amd title|EPYC 7261}} |designer=AMD

* {{x86|RDPID|<code>RDPID</code>}} - Read Processor ID ...ffer]] (BOB) that keeps tracks of those states for this very purpose. It's unknown if that has changed with Sunny Cove.

{{amd title|Ryzen 7 3700X}} |designer=AMD

...embedded microprocessors. Details about Au1 were disclosed at the Embedded Processor Forum in San Jose, CA, on June 13, 2000. ...[TSMC]] [[130&nbsp;nm]] process. Manufacturing details of later models are unknown.

| developer 2 = AMD ...uction in Q2, and in January 2009 the Au13xx models integrating a graphics processor. In October 2009 RMI merged with [[NetLogic Microsystems]] who was in turn