Semiconductor & Computer Engineering
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Editing Property:max pcie lanes
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This is a '''[[has type::number]]''' property representing the maximum number of [[PCIe]] lanes that are directly going to the chip in context. This number '''DOES NOT''' include lanes that come from auxiliary chips such as the [[southbridge]]. Note that this number ''usually'' refers to the number of usable PCIe as opposed to an absolute max as on some platforms (e.g., Intel's DMI 1/2/3) a set number of lanes are reserved for the chipset. | This is a '''[[has type::number]]''' property representing the maximum number of [[PCIe]] lanes that are directly going to the chip in context. This number '''DOES NOT''' include lanes that come from auxiliary chips such as the [[southbridge]]. Note that this number ''usually'' refers to the number of usable PCIe as opposed to an absolute max as on some platforms (e.g., Intel's DMI 1/2/3) a set number of lanes are reserved for the chipset. | ||
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Facts about "max pcie lanes"
| Has type "Has type" is a predefined property that describes the datatype of a property and is provided by Semantic MediaWiki. | Number + |
